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Xilinx Zynq SoC has two sdhci controllers but boot is only possible from
the first one. That's why there is a need to specify controller number.
mmc1 is supposed to be secondary boot device and should be also listed in
distribution boot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add zu48dr and zu49dr to the list of zynqmp devices. The zu48dr and zu49dr
are the new RFSoC silicons with id values of 0x7b and 0x7e.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds new jtag distro boot command to look for bootscript file in
DDR and execute it first incase of jtag bootmode.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds new dfu usb distro boot command to look for bootscript
from dfu-util and runs it.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
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This patch adds new jtag distro boot command to look for bootscript file
in DDR and execute it first incase of jtag bootmode.
This patch also updates scriptaddr to 512MB as there is high of script
corruption incase of bigger kernel image.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Define board_late_init which performs bootmode detection
and prepares corresponding distro boot commaand sequence.
Also disable it for mini platforms because simply there is no need to have
it enabled.
But also disable it for virtual platform because Qemu is not modelling this
register space that's why travis testing would fail. This configuration
should be reverted when mainline Qemu is updated.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds sdboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Thsi patch adds qspiboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Automatically detect PDA at boot.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Boot from QSPI nor flash.
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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Boot from nand flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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Remove 2017 from being printed at boot video console.
This is outdated.
To avoid this situation, remove the year completely.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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When SPL boots, enable green led on the board.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Add support for qspi memory on board. Created boot support for QSPI
for both u-boot proper and SPL.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Add support for SPL for this board: DRAM initialization, PMC initialization,
MMC boot.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Replace code with new function configure_ddrcfg_input_buffers from SFR
mach driver.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
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I'm not at bootlin anymore, and my mail address doesn't work any longer.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.
Fixes: 8f4691e31a18 ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")
Signed-off-by: Adam Ford <aford173@gmail.com>
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On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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When booting through the efi stub, the memory map get's created by
reading the dram bank information. Depending on the version of the RPi4
this information changes. Read the device tree to initialize the dram
bank data structure. This way the kernel is able to access the whole
range of available memory.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
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Change maintainers to Priyanka Jain for fsl-qoriq, mpc85xx
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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Suffix serdes frequency print with MHz
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add SerDes1 protocol 14 in the list of supported protocols.
This configuration enables one high-speed 100G port and PCIe x4.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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The code that generates the compatible property concatenates the
ethernet phy id and clause-compatible information without
separating them with a comma, resulting into no ethernet phy driver
getting loaded by Linux kernel.
Suffix phy_id_compatible_str with comma to fix this
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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lx2160a rev1 and rev2 SoC has different pcie controller.
The pcie controller device tree node fields "compatible"
and registers names needs to be updated accordingly
This change in device tree is handled as part of
fdt fixups. These changes would only be applied
if the soc revision is not rev1.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Makefile now produces ready-to-deploy idbloader.img file.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
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- Initial DM conversion
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- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
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Define the memory map for the BCM2711 based on the dt configuration
available in the Raspberry Pi kernel fork.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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The Raspebrry Pi 4 uses the new revision code scheme as documented by
the foundation. This change adds an entry for this board as well.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).
To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.
This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c
warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
int board_interface_eth_init(int interface_type, ....
^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-arc
These are some very late changes mostly required to get 64-bit
division working on ARC boards.
For that we had to import missing parts of libgcc and add compiler
flags to EMSDP which otherwise used very simple profile for compliation.
And while at it another fix for EM SDP initialization is inluded as well.
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Even though EM SDP is FPGA-based board and different FPGA
images (known as .bit-files) are awailable for the board still
there's a common subset of options we may rely on for all configs.
These are:
* Normalizer
* Swap instructions
* Simple multiplier
* Barrel-shifter
* Floating-point unit
* Shorter instructions (code density)
This among other improvements allows to compile code with
64-bit divisions, see [1].
[1] https://patchwork.ozlabs.org/patch/1156541/
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
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If the "Page Mode" is not enabled on the device,
read operations from PSRAM may result in incorrect data.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Find the UCLASS_CACHE driver to configure the cache controller's
settings.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This patch sets the serial# environment variable by reading the
board serial number from the OTP memory region.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
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Add DT entry for the DM PCI driver, update board configs
and drop ad-hoc board init code for the PCI bus. Instead,
let the DM PCI driver initialize and operate the hardware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This reverts commit fc04b923541d984b1544056fd3bfa8129d4e5aac where the
FVP DRAM configuration was added.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
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char num[1];
sprintf(num, "%d", i);
leads to a buffer overrun.
Simplify the overly complex coding.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
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Enable DM PCI for T2080RDB, T4240RDB, T1024RDB, T1042D4RDB, P1020RDB,
P2020RDB, P2041RDB, P3041DS, P4080DS, and MPC8548CDS
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