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Move FTMAC100 to where it should be, alphabetically in
drivers/net/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
drivers/net/Kconfig
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This patch adjusts memory map for secure boot headers on LS2080AQDS
and LS2080ARDB platforms. Secure boot headers are placed on NOR
flash at offset 0x00600000.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below
Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
PPA firmware 0x00400000
PHY firmware 0x00980000
DPAA2 MC 0x00A00000
DPAA2 DPL 0x00D00000
DPAA2 DPC 0x00E00000
Kernel.itb 0x01000000
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS
flag is enabled. In case QIXIS code is not enabled, use default
sysclk value as 100MHz per board documentation.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
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This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
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LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform.
Verification:
Boot linux kernel via dhcp and bootm ok.
NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000;
NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.178 (4899 ms)
Using mac@e0100000 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.178
Filename 'boomimage-310y-ae300-spi.bin'.
Load address: 0x600000
Loading: #################################################################
#################################################################
#################################################################
...
...
###################################
233.4 KiB/s
done
Bytes transferred = 13872076 (d3abcc hex)
NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.178 (4592 ms)
Using mac@e0100000 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.178
Filename 'ae300.dtb'.
Load address: 0x2000000
Loading: #
82 KiB/s
done
Bytes transferred = 2378 (94a hex)
NDS32 # bootm 0x600000 - 0x2000000
Image Name:
Created: 2017-03-22 6:52:03 UTC
Image Type: NDS32 Linux Kernel Image (uncompressed)
Data Size: 13872012 Bytes = 13.2 MiB
Load Address: 0000c000
Entry Point: 0000c000
Verifying Checksum ... OK
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Device Tree to 01efc000, end 01eff949 ... OK
Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09)
(gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) )
#293 PREEMPT Wed Mar 22 14:49:28 CST 2017
CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159)
...
...
Signed-off-by: rick <rick@andestech.com>
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In situations like an autobuilder we are likely to not have bl31.bin
present and thus would fail to build and propagate the error upwards.
Instead, print a big warning to stderr so that human will see that
something is wrong but complete the build.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't
get Kconfig errors on platforms without SPL, ie sandbox (without SPL).
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_IOLOOP
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate
CONFIG_IDE option so that IDE support can be enabled without requiring
the 'ide' command.
Update existing users and move the ide driver into drivers/block since
it should not be in common/.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_HD44760
Also drop CONFIG_CMD_HD44780 which appears to be a typo.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_HASH
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_GSC
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_ESBC_VALIDATE
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_EEPROM
CONFIG_CMD_EEPROM_LAYOUT
CONFIG_EEPROM_LAYOUT_HELP_STRING
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework Kconfig logic slightly, define EEPROM location on TI eval
platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_EECONFIG
Signed-off-by: Simon Glass <sjg@chromium.org>
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This subsystem is quite old. It has been replaced with a driver-model
version (UCLASS_THERMAL). Boards are free to convert to that if required,
but here is a removal patch that could be applied in the meantime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it. Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool. In many cases we can select
these because they are required to implement other drivers. We also
correct how we include the various hashing algorithms in SPL.
This commit was generated as follows (after Kconfig additions):
[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL
Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_SPL_BOARD_INIT
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Support Andestech AE3xx platform: serial, timer device tree flow.
Signed-off-by: rick <rick@andestech.com>
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Add minor ifdeffery and default board config for the Salvator-XS board
with R8A7796 M3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Rename the salvator-x_defconfig to r8a7795_salvator-x_defconfig in
preparation for the r8a7796 support on salvator-x board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Instead of counting only the DRAM in the first slot, count
all the DRAM in all slots and report it accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support for the EHCI USB.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC,
but keep the CPU reboot option as a fallback.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support for the AVB ethernet on the Salvator-X board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support for the SD card slots on the Salvator-X board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 .
Use the internal clock and ignore the early version of the chip.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The macro is used twice in the salvator-x board file, drop one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Cosmetic change, replace (1 << (n)) with BIT(n) .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support for the Arria10 SoCDK.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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Switch to use DM USB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Early backports of the imx wdog external reset feature occured before the
property was accepted upstream and used 'ext-reset-output' instead of
'fsl,ext-reset-output'. In order to support older kernels remove both
properties.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Now that mx6sabresd_spl_defconfig can be used to boot all
mx6sabresd variants, the non-SPL targets can be safely removed.
Signed-off-by: Fabio Estevam <fabio.estvam@nxp.com>
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Add support for the mx6dlsabresd board in SPL.
Retrieved the DCD table from:
board/freescale/mx6sabresd/mx6dlsabresd.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)
Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabresd boards.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Currently only MX6Q/QP sabresd boards are supported in SPL.
In order to also support MX6DL we need to convert to using
IOMUX_PADS and SETUP_IOMUX_PADS macros.
Other than that move the <asm/arch/mx6-ddr.h> header inclusion to the
SPL code block in order to avoid build error.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Move board_late_init into common area from supported boards.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Move possible common board code into common area
from supported boards.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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