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This patch renames the routine fdtdec_setup_memory_size()
to fdtdec_setup_mem_size_base() as it now fills the
mem base as well along with size.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This patch added support of mmio read and write commands. These commands
can be used to read and write registers from the u-boot command line.
It can be useful in debugging.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Converting GPIO to DM requires to do changes in reset subsystem
that's why support for Microblaze soft reset via sysreset and GPIO
sysreset support was added.
These two patches enables enabling GPIO DM.
Microblaze soft reset is bind at last reset method.
GPIO reset is handled via sysreset with adding this fragment to DT.
gpio-restart {
compatible = "gpio-restart";
gpios = <&reset_gpio 0 0 0>;
/* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */
};
hard-reset-gpio property is not documented and also handled.
Conversion is required.
Unfortunately do_reset is required for SPL that's why use only soft
microblaze reset for now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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We should support watchdog reset so that WATCHDOG_RESET will function
properly.
Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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These macros are not required anymore. These will be taken from
configuration file.
Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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U_BOOT_CMD_MKENT
This patch changed zynqmp command to handle subcommands with
U_BOOT_CMD_MKENT.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The same change as was done for zynqmp with this description:
Add support for enabling the first watchdog pointed via aliases.
DT fragment:
aliases {
...
watchdog0= &watchdog0;
watchdog1 = &watchdog_lpd;
...
};
<zynqmp example removed>
Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for enabling the first watchdog pointed via aliases.
DT fragment:
aliases {
...
watchdog0 = &watchdog0;
watchdog1 = &watchdog_lpd;
...
};
dm tree fragment for above configuration with patch applied:
ZynqMP> dm tree
Class index Probed Driver Name
-----------------------------------------
...
watchdog 0 [ ] cdns_wdt | |-- watchdog@ff150000
watchdog 1 [ + ] cdns_wdt | `-- watchdog@fd4d0000
...
dm uclass fragment:
ZynqMP> dm uclass
...
uclass 75: watchdog
0 watchdog@ff150000 @ 7df02f40, seq -1, (req 1)
1 * watchdog@fd4d0000 @ 7df02ff0, seq 0, (req 0)
...
It is visible that index 1 is IP with seq 0 which means that FPD
watchdog (@fd4d0000) is in DT below LPD watchdog (@ff150000).
Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This macro is not used anywhere that's why remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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sysreset uclass have own do_reset function which should be used instead
of board/platform specific.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
authenticated or encrypted or both authenticated and encrypted
image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
image back to DDR as per destination address. The image has
to be encrypted using xilinx bootgen tool and to get only the
encrypted image from tool use -split option while invoking
bootgen.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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U-Boot needs to link ps7_init_gpl.c on Zynq or psu_init_gpl.c on
ZynqMP (PS init for short). The current logic to locate this file for
both platforms is:
1. if a board-specific file exists in
board/xilinx/zynq[mp]/$(CONFIG_DEFAULT_DEVICE_TREE)/ps?_init_gpl.c
then use it
2. otherwise use board/xilinx/zynq/ps?_init_gpl.c
In the latter case the file does not exist in the U-Boot sources and
must be copied in the source tree from the outside before starting the
build. This is typical when it is generated from Xilinx tools while
developing a custom hardware. However making sure that a
board-specific file is _not_ found (and used) requires some trickery
such as removing or overwriting all PS init files (e.g.: the current
meta-xilinx yocto layer).
This generates a few problems:
* if the source tree is shared among different out-of-tree builds,
they will pollute (and potentially corrupt) each other
* the source tree cannot be read-only
* any buildsystem must add a command to copy the PS init file binary
* overwriting or deleting files in the source tree is ugly as hell
Simplify usage by allowing to pass the path to the desired PS init
file in kconfig variable XILINX_PS_INIT_FILE. It can be an absolute
path or relative to $(srctree). If the variable is set, the
user-specified file will always be used without being copied
around. If the the variable is left empty, for backward compatibility
fall back to the old behaviour.
Since the issue is the same for Zynq and ZynqMP, add one kconfig
variable in a common place and use it for both.
Also use the new kconfig help text to document all the ways to give
U-Boot the PS init file.
Build-tested with all combinations of:
- platform: zynq or zynqmp
- PS init file: from XILINX_PS_INIT_FILE (absolute, relative path,
non-existing), in-tree board-specific, in board/xilinx/zynq[mp]/
- building in-tree, in subdir, in other directory
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add socdk board support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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Add support for loading U-Boot on the Broadcom 7445 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
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This commit adds uCRobotics Bubblegum-96 board support. This board is
one of the 96Boards Consumer Edition platform based on Actions Semi
S900 SoC.
Features:
- Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU)
- 2GiB RAM
- 8GiB eMMC, uSD slot
- WiFi, Bluetooth and GPS module
- 2x Host, 1x Device USB port
- HDMI
- 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons
U-Boot will be loaded by ATF at EL2 execution level. Relevant driver
support will be added in further commits.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them. Remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This fixes the warnings:
WARNING: no status info for 'ge_bx50v3'
WARNING: no maintainers for 'ge_bx50v3
Signed-off-by: Stefano Babic <sbabic@denx.de>
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fdt_file is looking for imx6ul-geam-kit.dtb but Linux
has imx6ul-geam.dtb, since Linux skipped -kit on file name
by below commit.
"ARM: dts: imx6ul-geam: Skip suffix -kit from dts name"
(sha1: 182de5ebce71e469cfa686fcdf08c9cbe11ece97)
So, due to this mismatch U-Boot failed to pick the
proper dtb which eventually break the Linux boot.
This patch fixed this mismatch by
- renaming dts files
- update config option to use new dtb file
- update fdt_file to new dtb file name
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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The generic efi payload currently does not enumerate the PCI bus,
which means peripherals on the PCI bus are not discovered by their
drivers. This uses board_early_init_r() to do the PCI enumeration.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Previous rename of efi-x86 target missed the MAINTAINERS update,
which caused the buildman warnings:
WARNING: no status info for 'efi-x86_app'
WARNING: no maintainers for 'efi-x86_app'
This updates the board MAINTAINERS to reflect the up-to-date info.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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This adds DM_GPIO support for the davinici GPIO driver with
DT support.
Signed-off-by: Adam Ford <aford173@gmail.com>
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The soms with 4GB ddr have a rowaddr of 16 not 15, this allows
the detection mechanism to properly identify them as 4GB.
However these soms can be populated with whatever amount of
memory the customer requests therefor we need a ram stride test.
We can not use the get_ram_size() function because not all 4GB's
of DDR is addressable on a 32-bit architecture. Therefore instead
we use a memory stride of 128MB's and look for the address that
the memory wraps. This function is used for all som types to
catch most memory configurations.
This is a revised version of Rabeeh Khoury's original code.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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In order to properly detect the board the checks need to be done
in a specific order. Move these tests back into a single enum
function that will always return the proper the board it is checking.
This also adds the best test we have for detecting the rev 1.5 som,
and it simplifies the device-tree filename building.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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Match imx6q-icore-mipi and imx6dl-icore-mipi dtb in
board_fit_config_name_match.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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The get_board_rev() is not needed anymore as a generic function
for the imx53 SoC has been used instead.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This code provides information if the K+P's imx53 boards had KEY1
pressed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This change gives the opportunity to adjust Linux command line for the
imx53 device with some legacy data.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This patch prevents from the situation where we may end up with garbage
displayed on the LCD panel.
Such situation occurs when one performs "reboot -f" in Linux and then
stop in U-boot (or observe the garbage on the screen during boot up).
To prevent from such situation - the PWM pin is configured as GPIO and set
to LOW.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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Without this change the following warning shows up when building:
board/liebherr/display5/display5.c:270:3:
warning: implicit declaration of function ‘eth_env_set_enetaddr’ [-Wimplicit-function-declaration]
This commit fixes this issue.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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Signed-off-by: Lukasz Majewski <lukma@denx.de>
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This code performs DDR3 memory calibration for display5 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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Test case:
The fitImage gets corrupted:
truncate -c -s 3M fitImage
run tftp_mmc_fitImg
setenv boot_os y
reset
[board shall hang in SPL with
"Trying to boot from MMC1" information]
Then after X seconds WDT is causing board to reset. After N boot attempts
we enter recovery mode.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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To enter the special mode, one needs to short cut two pads with e.g. screw
driver.
After power up the SPL will execute u-boot in which proper actions will be
taken.
It is worth noting that we do not alter envs (even the BOOT_FROM variable)
and unconditionally go to recovery.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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Force booting through u-boot proper when environment error encountered
(as a result of either broken SPI-NOR or erased envs).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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To avoid confusion, let's rename the efi-x86 target to efi-x86_app.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This turns on the EFI framebuffer driver support so that a graphics
console can be of additional help.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Now that we have generic EFI payload support, drop EFI-specific test
logics in BayTrail Kconfig and codes, and all BayTrail boards too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Now that we have generic EFI payload support for all x86 boards,
drop the QEMU-specific one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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It is possible to create a generic EFI payload for all x86 boards.
The payload is configured to include as many generic drivers as
possible. All stuff that touches low-level initialization are not
allowed as such is the EFI BIOS's responsibility. Platform specific
drivers (like gpio, spi, etc) are not included.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Orange Pi Zero Plus is an open-source single-board computer
using the Allwinner H5 SOC.
H5 Orangepi Zero Plus has
- Quad-core Cortex-A53
- 512MB DDR3
- micrSD slot
- 16MBit SPI Nor flash
- Debug TTL UART
- 1GBit/s Ethernet (RTL8211E)
- Wifi (RTL8189FTV)
- USB 2.0 Host
- USB 2.0 OTG + power supply
The device tree file is copied from the Linux kernel 4.17.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Orange Pi R1 is an open-source single-board computer using the
Allwinner H2+ SOC.
H2+ Orange Pi R1 has
- Quad-core Cortex-A7
- 256MB DDR3
- micrSD slot
- 128MBit SPI Nor flash
- Debug TTL UART
- 100MBit/s Ethernet (H2+)
- 100MBit/s Ethernet (RTL8152B)
- Wifi (RTL8189ETV)
- USB 2.0 OTG + power supply
This board is very similar to the Orange Pi Zero.
The device tree file is copied from the Linux kernel 4.17.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Fix the CPGWPR/CPGWPCR register address on V3M Eagle to unlock
access to the CPG clock control registers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Here we just add a tool for HSDK flashable images preparation
together with extensive documentation for HSDK board.
This will help real-life users to update U-Boot on the board.
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