| Age | Commit message (Collapse) | Author |
|---|
|
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
|
|
This command is used to load/boot an OS-image which is transferred from
the CPCI host to the CPCI target/adapter.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
|
|
Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
ARIA is a MPC5121E based COM Express module by Dave/DENX.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
|
|
This commit changes the MPC512x code to use I/O accessor calls (i.e.
out_*() and in_*()) instead of using deprecated pointer accesses.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
|
|
- add GPIO module description
- add Address Latch Timing Register description
- add IO Control Memory Map
- add FEC Memory Map
Also change board/freescale/mpc5121ads/mpc5121ads.c and
cpu/mpc512x/iopin.c as needed.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
|
|
We rename the board so we use a consistent name in U-Boot and in
Linux. Also, we use this opportunity to move the board into the
Freecale vendor directory.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
|
|
We will soon see several new MPC521x based boards added. This patch
moves files that are not board specific to a common directory so they
can be shared by all such ports. It also splits off common IDE code
into a new file, cpu/mpc512x/ide.c .
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
|
|
Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.
Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.
This patch cleans this up - for example:
Before:
=> help dtt
dtt - Digital Thermometer and Thermostat
Usage:
dtt - Read temperature from digital thermometer and thermostat.
After:
=> help dtt
dtt - Read temperature from Digital Thermometer and Thermostat
Usage:
dtt
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
There are currently 3 versions of the zoom2 board.
The production board, that is currently being released.
The beta board, similar in form to the production board but not released.
The alpha board, a set of PCBs with a very limited circulation.
GPIO 94 is used to determine the version of the board. If GPIO 94 is clear,
the board is a production board, otherwise it is a beta board.
The alpha board will likely be mistaken for a beta board. An alpha board
was unavailible for testing.
This has been tested on the beta and production boards.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
There is no new functionality in the change.
This change is a conversion from the using raw register access to using
the OMAP3 GPIO API described in doc/README.omap3.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
|
|
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
The Beagle rev Cx and Overo boards are using both SDRC CSes. The MUX
setting is needed for the second CS clock signal to allow the 2 RAM
parts to be put in self-refresh correctly. This also works on rev B
Beagle boards with 128M of RAM.
From: Steve Sakoman <steve@sakoman.com>
From: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
|
|
This patch controls the large LED on the top left of the zoom2.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|
Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board.
The default serial is from the USB connector on left side of the debug board.
The USB connector will produce 2 of the 4 UARTS. On your host pick the first
enumeration.
The details of the setting of the serial gpmc setup are not available.
The values were provided by another party.
The serial port set up is the same with Zoom1.
Baud rate 115200, 8 bit data, no parity, 1 stop bit, no flow.
The kernel bootargs are
console=ttyS3,115200n8
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|
all arm boards except a few use the same cpu linker script
so move it to cpu/$(CPU)
that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
Initial U-Boot support for the DaVinci DM355 EVM. This is a board
from Spectrum Digital. Board docs include schematic and firmware
for its microcontroller:
http://c6000.spectrumdigital.com/evmdm355/revd/
Most of the DM355 chip is fully documented by TI, the most notable
exception being the MPEG/JPEG coprocessor (programmable using codecs
available at no cost from TI), which is omitted from its DM335 sibling:
http://focus.ti.com/docs/prod/folders/print/tms320dm355.html
This version can boot from the on-board DM9000 Ethernet chip, after
being loaded (from NAND, MMC/SD, or UART). In the near future, NAND
and USB support could be added ... NAND support is being held back
until the support for the 4-bit ECC hardware is ready.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
The logicpd web site is a good source for general information on this board.
Please start looking here if the below links are broken.
http://www.logicpd.com
This is a pdf of the product
http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
This is a pdf of the product quick start guide.
The debug board is described here.
http://support.logicpd.com/downloads/1165/
This is a wiki showing the debug board in use
https://omapzoom.org/gf/project/omapzoom/wiki/?pagename=GettingStartedWithZoomII_AKA_OMAP34XII_MDP
The zoom2 has an auxillary board that contains the serial, net, jtag and
battery simulator. This change supports a runtime check if the debug board is
connected.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|
Zoom2 is a new board from Texas Instruments and LogicPD
The logicpd web site is a good source for general information on this board.
Please start looking here if the below links are broken.
http://www.logicpd.com
This is a pdf of the product
http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
This is the product description web page
http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp
This patch provides a zoom2 base target by copying zoom1 and by making some
obvious changes.
To configure, run
make omap3_zoom2_config
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|
The u-boot.lds is common for all DaVinci boards. The patch removes
multiple instances and moves the u-boot.lds to /cpu/arm926ejs/davinci
folder. This addresses one of the comments i received while submitting
patches for DM3xx
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
|
|
The u-boot.lds file is common for all omap boards.
Move a cleaned up version to the cpu layer and add makefile logic to use it.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|
Move the clock-rate dumping code into the cpu/.../davinci area
where it should have been, enabled by CONFIG_DISPLAY_CPUINFO,
updating the format and showing the DSP clock (where relevant).
Switch boards to use the cpuinfo() hook for this stuff.
Remove a few now-obsolete PLL #defines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
actually the timer init use the interrupt_init as init callback
which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer
related code is moved to timer.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
Move DaVinci PSC support from board/* to cpu/* where it belongs.
The PSC module manages clocks and resets for all DaVinci-family
SoCs, and isn't at all board-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Chips without the EMAC controller won't need the utilities
it uses to read an Ethernet address from EEPROM; so don't
include them needlessly.
Use is_valid_ether() to validate the address from EEPROM.
All-zero addresses aren't the only invalid addresses.
A fully erased EEPROM returns all-ones, also invalid...
Switch those Ethernet utilities to use "%pM" for printing
MAC addresses; and not say ROM when they mean EEPROM.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
|
|
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").
Here the commands to load and start this image from the BDI2000:
440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000
Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch removes the cpld binary bitstream that is
used by esd's cpld command on DP405 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch removes the cpld binary bitstream that is
used by esd's cpld command on VOM405 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch removes the cpld binary bitstream that is
used by esd's cpld command on PMC405 boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch removes the cpld binary bitstream that is
used by esd's cpld command on CMS700 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch adds support for an address parameter to esd's
cpld command. This is in preparation to remove compiled-in
binary cpld (xsvf) bitstreams.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop,
and isdram are no longer available so all references to them have been
updated to the new form of "i2c <cmd>".
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
Add "_test" to cm5200's function test command names to prevent
overlap with common, global function names. Originally, the
"do_i2c" function test command interfered with
common/cmd_i2c.c's "do_i2c" when CONFIG_I2C_CMD_TREE was defined.
The functions were also made static as they are not globally accessed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
The following changes were made, primarily to bring the Marvell i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
offhand chance someone adds slave support in the future
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
The following changes were made, primarily to bring the cpci750 i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
offhand chance someone adds slave support in the future
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Mikhail Zaturenskiy <mzaturenskiy@shoppertrak.com>
|
|
The BCSR17[7] = 1 will unlock the write protect of FLASH.
The WP# pin only controls the write protect of top/bottom sector,
That is why we can save env, but we can't write the first sector
before the patch.
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
|
Currently the clk_adj is 6 (3/4 cycle), The settings will cause
the DDR controller hang at the data init. Change the clk_adj
from 6 to 4 (1/2 cycle), make the memory system stable.
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
|
Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.
It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
And it repaires the trizepsiv board build which was broken around the
same routines
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
|
|
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
|
|
The pins for async memory where parallel flash lives are not enabled by
default, so make sure we mux them as needed.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
Signed-off-by: Detlev Zundel <dzu@denx.de>
|
|
The pin which was used in preliminary versions of the board for ide
reset is really connected to the rtc clock.
Signed-off-by: Detlev Zundel <dzu@denx.de>
|
|
Signed-off-by: Detlev Zundel <dzu@denx.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
|
|
AFEB9260 uses PA10, PA11 for ETX2 and ETX3.
Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence,
not 0.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
|
|
We don't know what state the ethernet PHY is in when starting up, so make
sure we set it to a sane state. This fixes troubles seen when Linux boots
up, configures the PHY is a non-default state, and then the system reboots
into U-Boot which previously expected a reset state only.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
