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2013-12-05driver:i2c:s3c24x0: adapt driver to new i2cPiotr Wilczek
This patch adapts the s3c24x0 driver to the new i2c framework. Config file is modified for all the boards that use the driver. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> CC: Heiko Schocher <hs@denx.de> CC: Inderpal Singh <inderpal.singh@linaro.org> CC: David Müller <d.mueller@elsoft.ch> CC: Chander Kashyap <k.chander@samsung.com> CC: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
2013-12-04powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROMPo Liu
Currently, there is only one EEPROM on c29xpcie board which is AT24C1024. We program the SPD data at beginning of the AT24C1024.But the AT24C1024 has a 16-bit sub-address mode. This patch is tomake it work when getting SPD in a 16-bit sub-address EEPROM. Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-12-04pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAMHardik Patel
Signed-off-by: Hardik Patel <hardik.patel@volansystech.com>
2013-12-04ARM: dra7_evm: Add SATA supportRoger Quadros
The evm has a SATA port. Enable SATA configuration and inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
2013-12-04ARM: omap5_uevm: Add SATA supportRoger Quadros
The uevm has a SATA port. Inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
2013-12-04am33xx: Stop modifying certain EMIF4D registersTom Rini
Based on the definitive guide to EMIF configuration[1] certain registers that we have been modifying (and are documented registers) should be left in their reset values rather than modified. This has been tested on AM335x GP EVM and Beaglebone White. [1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Heiko Schocher <hs@denx.de> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org>
2013-12-04pcm051: Support for revision 3Lars Poeschel
Phytec sells revision or version 3 of pcm051. It is labeled 1358.3 on the board. The difference for u-boot is that is has other DDR3 RAM on it: 1 x MT41K256M16HA125E instead of 2 x MT41J256M8HX15E on revisions 1 and 2. Both configurations are 512 MiB. Configure your u-boot build with pcm051_rev3 for the new RAM and pcm051_rev1 for the old RAM configuration. Board revision 2 has to use pcm051_rev1 also. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
2013-12-04cm_t335: add support for status LEDIlya Ledvich
Add support for status LED. Use the STATUS_LED APIs for indicating a boot progress. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-12-04cm_t335: add cm_t335 board supportIlya Ledvich
Add cm_t335 board directory, config file. Enable build. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> [trini: Adapt Makefile] Signed-off-by: Tom Rini <trini@ti.com>
2013-12-03board: trats2: fix access to samsung registersPiotr Wilczek
This patch use 'samsung_get_base' common functions to access registers. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-03arm: rmobile: Add support koelsch boardNobuhiro Iwamatsu
The koelsch board has R8A7791, 2GB DDR3-SDRAM, USB, Quad SPI, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
2013-12-03arm: rmobile: Add support lager boardNobuhiro Iwamatsu
The lager board has R8A7790, 4GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
2013-12-03trats: usb: Add usb_cable_connected() functionPrzemyslaw Marczak
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-02Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini
2013-12-02Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2013-12-02trats2: enable ums support on Trats2Piotr Wilczek
This patch adds support for USB and enables 'ums' command on Trats2 board. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-01arm926ejs, at91: add common phy_reset functionHeiko Schocher
add common phy reset code into a common function. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Jens Scharsig <esw@bus-elektronik.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Stelian Pop <stelian@popies.net> Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Eric Benard <eric@eukrea.com> Cc: Markus Hubig <mhubig@imko.de> Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: spl boot from fat fs SD cardBo Shen
Enable Atmel sama5d3xek boart spl boot support, which can load u-boot from SD card with FAT file system. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: early enable PIO peripheralsBo Shen
Enable the PIO peripherals early than other peripherals. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-11-28udoo: Fix watchdog during kernel boot.Giuseppe Pagano
uDoo uses APX823-31W5 watchdog chip. Timeout is about 1.2 seconds. To disabled watchdog during kernel boot, WDI pin of that chip needs to be in "high impedance" state. I.mx6 gpio configuration does not contemplate tristate, so pin is set as input in high impedance. Signed-off-by: Giuseppe Pagano <giuseppe.pagano@seco.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-28udoo: Add ethernet support (FEC + Micrel KSZ9031).Giuseppe Pagano
Add Ethernet and networking support on uDoo board (FEC +phy Micrel KSZ9031). Ethernet speed is currently limited to 10/100Mbps. Signed-off-by: Giuseppe Pagano <giuseppe.pagano@seco.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-28udoo: Move and optimize platform register setting.Giuseppe Pagano
Previous uDoo configuration adopts register settings for DDR3, clock, muxing, etc. taken from Nitrogen6x. uDoo schematics is rather different from that board, and it needs customized setting for most of the registers. All this changes can be considered atomical since it is part of initial support of the board. Patch changes uDoo configuration files path to a specific one, and adopt optimized value for every configured register. Signed-off-by: Giuseppe Pagano <giuseppe.pagano@seco.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-28mx6sabresd: Add SPI NOR supportFabio Estevam
mx6sabre board has a m25p32 SPI NOR connected to ECSPI1 port. Add support for it. This patch allows the SPI NOR flash to be succesfully detected: => sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-28mx6sabresd: Fix wrong colors in LVDS splashFabio Estevam
Currently HDMI splash screen is selected by default on mx6sabresd boards. As LVDS is also enabled, this causes incorrect colors to be displayed im the LVDS panel. Fix this by selecting the LVDS panel as the default splash output and only keep HDMI or LVDS turned on at the same time. Acked-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-27efikamx: Fix pmic_init() argumentFabio Estevam
On efikamx board the PMIC is connected via SPI interface, so it does not make sense to pass I2C_PMIC into the pmic_init() interface. Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-27mx31pdk: Fix pmic_init() argumentFabio Estevam
On mx31pdk board the PMIC is connected via SPI interface, so it does not make sense to pass I2C_PMIC into the pmic_init() interface. Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-11-27mx51evk: Fix pmic_init() argumentFabio Estevam
On mx51evk board the PMIC is connected via SPI interface, so it does not make sense to pass I2C_PMIC into the pmic_init() interface. Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2013-11-26malta: enable PIIX4 SERIRQPaul Burton
Whilst U-boot does not require this itself, Linux currently relies upon it having been muxed and enabled by the bootloader. Thus in order to preserve compatibility with current kernels before a fix is merged in Linux we will enable the SERIRQ interrupt and mux it to its pin. Without doing this current kernels will never receive serial port interrupts and the end result is typically that userland appears to hang. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-25t2080qds/ramboot: enable PBL tool for t2080qdsShengzhou Liu
Add the default RCW(SerDes 0x66_0x16) and PBI configure file for T2080QDS board, so we can use PBL tool to generate the ramboot image to support boot from NAND/SPI/SD. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2013-11-25powerpc/t2080qds: add support for t2080qds boardShengzhou Liu
The T2080QDS is a high-performance computing evaluation, development and test platform supporting the T2080 QorIQ Power Architecture processor. T2080QDS feature overview Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz Memory: - Single memory controller capable of supporting DDR3 and DDR3-LV devices - Two DDR3 DIMMs up to 4GB, Dual rank @ 2133MT/s and ECC support Ethernet interfaces: - Two 1Gbps RGMII on-board ports - Four 10Gbps XFI on-board cages - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes: - 16 lanes up to 10.3125GHz - Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI IFC: - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA eSPI: - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040) USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB) PCIE: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) SATA: - Two SATA 2.0 ports on-board SRIO: - Two Serial RapidIO 2.0 ports up to 5 GHz eSDHC: - Supports SD/SDHC/SDXC/eMMC Card I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports System Logic: - QIXIS-II FPGA system controll Debug Features: - Support Legacy, COP/JTAG, Aurora, Event and EVT Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: removed Makefile blank line at EOF, fix conflicts with moving DDR driver] Acked-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/IFC: Move Freescale IFC driver to a common driverYork Sun
Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/misc and fix the header file includes. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xxYork Sun
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3 structure for 83xx, 85xx and 86xx. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini
2013-11-25board: tqm5200: delete its own object make ruleMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25board: h2200: Delete an unnecessary make ruleMasahiro Yamada
We have a generic rule to generate .o file from *.S in $(TOPDIR)/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-21am335x: fix GPMC config for NAND and NOR SPL bootpekon gupta
GPMC controller is common IP to interface with both NAND and NOR flash devices. Also, it supports max 8 chip-selects, which can be independently connected to any of the devices. But ROM code expects the boot-device to be connected to only chip-select[0]. Thus to resolve conflict between NOR and NAND boot. This patch: - combines NOR and NAND configs spread in board files to common gpmc_init() - configures GPMC based on boot-mode selected for SPL boot. Signed-off-by: Pekon Gupta <pekon@ti.com>
2013-11-21sama5d3xek: support larger than 4G nand flashWu, Josh
Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-11-17Makefile: rename all libraries to built-in.oMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17Makefile: make directories by Makefile.buildMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17Makefile: specifiy an explicite object name rather than $(BOARD).oMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17board: Do not add -DCONFIG_SYS_TEXT_BASE in board config.mkMasahiro Yamada
Board config.mk do not need to add -DCONFIG_SYS_TEXT_BASE to CPPFLAGS because the top level config.mk does instead. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-15nios2: remove unnecessary header include pathMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Thomas Chou <thomas@wytron.com.tw>
2013-11-15board: cogent: include header files in a more natural wayMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-14Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2013-11-13powerpc/t104xrdb: Add T1042RDB_PI board supportPriyanka Jain
T1042RDB_PI is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture™ processor. T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit. The board is designed with low power features targeted for Printing Image Market. T1042RDB_PI is similar to T1040RDB board with few differences like it has video interface, supports T1042 personality T1042RDB_PI board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Two on-board RGMII 10/100/1G ethernet ports. - SERDES Connections, 8 lanes supporting: — PCI — SATA 2.0 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Video - DIU supports video at up to 1280x1024x32bpp - HDMI connector - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Device connected: EEPROM, thermal monitor, VID controller, RTC - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
2013-11-13powerpc/t104xrdb: Add T1040RDB board supportPriyanka Jain
T1040RDB is Freescale Reference Design Board supporting the T1040 QorIQ Power Architecture™ processor. T1040RDB board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch - Four 1 Gbps Ethernet controllers - SERDES Connections, 8 lanes supporting: - PCI - SGMII - QSGMII - SATA 2.0 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> [York Sun: fixed Makefile] Acked-by: York Sun <yorksun@freescale.com>
2013-11-13powerpc/p1010rdb: update readme for p1010rdb-pa and p1010rdb-pbShengzhou Liu
- Remove duplicate doc/README.p1010rdb - Rename README to README.P1010RDB-PA - Add new README.P1010RDB-PB P1010RDB-PB is a variation of previous P1010RDB-PA board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2013-11-13powerpc/t1040: enable PBL tool for T1040Prabhakar Kushwaha
Use a default RCW of protocol 0x66. A PBI configure file which uses CPC as 256KB SRAM. It can be used by PBL tool on T1040 to build a pbl boot image. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2013-11-13i.MX6DQ/DLS: replace pad names with their Linux kernel equivalentsEric Nelson
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
generated by cgit (git 2.34.1) at 2025-01-24 23:35:55 +0000