Age | Commit message (Collapse) | Author |
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Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing
values.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Most of the boards we support with H3/H5 enable DRAM on-die termination,
which is consistent with the high DRAM clocks that are used.
Make it the default (like it's done for other similar platforms) instead
of defining it in each defconfig.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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The Detection pin is at PF6 and not at PH13 like defined before. I
checked the schematics and now I am am not seeing this error message any
more:
Loading Environment from FAT... Card did not respond to voltage select!
CONFIG_MMC_SUNXI_SLOT_EXTRA is also not needed because the second MCC
slot is for the Wifi card.
Fixes: 76d69eb01de ("sun50i: h5: Add initial Orange Pi Zero Plus support")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Onc of key blocker for using USB Generic host controller
drivers in Allwinner are CLK and RESET drivers, now these
available for USB usage.
So switch sunxi USB use EHCI and OHCI Generic controllers.
Enabling USB is wisely a board choise, So Enable USB_OHCI_HCD
where it already have USB_EHCI_HCD
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
CONFIG_NR_DRAM_BANKS after a check, just migrate it over now.
- CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 +
2), set this to 8.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Orange Pi Zero Plus is an open-source single-board computer
using the Allwinner H5 SOC.
H5 Orangepi Zero Plus has
- Quad-core Cortex-A53
- 512MB DDR3
- micrSD slot
- 16MBit SPI Nor flash
- Debug TTL UART
- 1GBit/s Ethernet (RTL8211E)
- Wifi (RTL8189FTV)
- USB 2.0 Host
- USB 2.0 OTG + power supply
The device tree file is copied from the Linux kernel 4.17.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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