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2019-05-14net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used togetherJames Byrne
Commit d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns that you shouldn't select both of them due to a device ID clash between the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately boards like the SAMA5D3xEK do contain both types of PHY, but fortunately the Linux Micrel PHY driver provides a solution by using different PHY ID and mask values to distinguish these chips. This commit contains the following changes: - The PHY ID and mask values for the KSZ9021 and the KS8721 now match those used by the Linux driver. - The warnings about not enabling both drivers have been removed. - The description for PHY_MICREL_KSZ8XXX has been corrected (these are 10/100 PHYs, not GbE PHYs). - PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE since this is selected by PHY_MICREL_KSZ90X1. - All of the relevant defconfig files have been updated now that PHY_MICREL_KSZ8XXX does not default to 'Y'. Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-29configs: move CONFIG_SPL_TEXT_BASE to KconfigSimon Goldschmidt
Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-07configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-28imx: Add PHYTEC phyBOARD-i.MX6UL-SeginMartyn Welch
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>