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path: root/configs/socfpga_stratix10_defconfig
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2019-08-25Convert CONFIG_SYS_SPI_U_BOOT_OFFS to KconfigHannes Schmelzer
This converts the following to Kconfig: CONFIG_SYS_SPI_U_BOOT_OFFS Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> [trini: Expose this for SPL_SPI_SUNXI for now] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-10configs: stratix10: Enable CONFIG_SPI_FLASH_USE_4K_SECTORSLey Foon Tan
Fix SPI flash environment erase size error. CONFIG_ENV_SECT_SIZE is set to 4KB. Enable CONFIG_SPI_FLASH_USE_4K_SECTORS to allow erase one environment sector. Fix error below: SOCFPGA_STRATIX10 # saveenv Saving Environment to SPI Flash... SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB Erasing SPI flash...SF: Erase offset/length not multiple of erase size Failed (-22) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06arm: socfpga: Move Stratix 10 SDRAM driver to DMLey Foon Tan
Convert Stratix 10 SDRAM driver to device model. Get rid of call to socfpga_per_reset() and use reset framework. SPL is changed from calling function in SDRAM driver directly to just probing UCLASS_RAM. Move sdram_s10.h from arch to driver/ddr/altera directory. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-29configs: move CONFIG_SPL_TEXT_BASE to KconfigSimon Goldschmidt
Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-25arm: socfpga: imply/default common config optionsSimon Goldschmidt
This commit moves common config options used in all socfpga boards to select/imply in Kconfig. This both cleans up the defconfig files as well as makes future changes easier. Options implied/defaulted for all sub-arches: - SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS Options implied/defaulted for implied for A10 & gen5: - FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE Options implied/defaulted for gen5: - SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2019-04-17configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2Ley Foon Tan
Stratix10 maps dram in 2 address spans, from 0-2GB and from 2GB up to 128GB. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-03-26Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF
2019-03-25Convert CONFIG_SF_DEFAULT_* to KconfigPatrick Delaunay
This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25configs: Stratix10: Remove CONFIG_USE_TINY_PRINTFLey Foon Tan
Use full printf instead of tiny printf in SPL. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-02-07configs: Don't use SPI_FLASH_BAR as defaultVignesh R
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-01spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FATTien Fong Chee
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-15arm: socfpga: stratix10: Add CONFIG_OF_EMBEDDalon Westergreen
The dtb should be embedded in the u-boot-spl image so that the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it. This also affects the main u-boot image, so adjust CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now also includes the dtb. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-03configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-17Convert CONFIG_MII et al to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_MII CONFIG_DRIVER_TI_EMAC Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-16configs: Migrate CONFIG_NR_DRAM_BANKSTom Rini
We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-12arm: socfpga: stratix10: Enable Stratix10 SoC buildLey Foon Tan
Add build support for Stratix SoC Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Conflicts: arch/arm/Kconfig arch/arm/mach-socfpga/Kconfig
generated by cgit (git 2.34.1) at 2024-12-27 19:27:42 +0000