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Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Move the config IDENT_STRING to Kconfig and migrate all boards
[sivadur: Migrate zynq boards]
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[trini: Update configs, add some default to sunxi Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Move the SPL settings into common/spl where most of the SPL code is kept.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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The patch:
"dm: mmc: zynq: Convert zynq to use driver model for MMC"
(sha1: 329a449f2c289b4de8f892fca1d9379ce5fd81b8)
added dependency on enabling some MMC options by default.
There are minimal ZynqMP configurations which require
only minimal configurations to be enabled to keep u-boot size
as lower as possible.
Move options to defconfig instead.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Update Microblaze, Zynq and ZynqMP defconfigs to reflect
latest Kconfig changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Compile SPL for all boards even psu_init.c/h files are not in the tree
yet. But this change enables covering SPL issues in mainline.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Serial driver starts to use clk framework that's why
enable it by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Based on:
"ARM: uniphier: use the default CONFIG_BOOTDELAY=2"
(sha1: 7c8ef0feb97586d35b0296b48903daef8c06ab21)
"I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig,
CONFIG_BOOTDELAY=2, is just fine for these boards."
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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move CONFIG_BOOTDELAY into a Kconfig option. Used for this
purpose the moveconfig.py tool in tools.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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For boards which have more devices it is necessary to extend malloc
space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable support for RAM based FIT images read by SPL.
Empty function for now to keep compiler happy.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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We know for certain that we have 32bit DMA hardware, but 64bit addresses
on LS2085A and ZynqMP, so let's enable EFI bounce buffers for all defconfigs
on these SoCs.
Signed-off-by: Alexander Graf <agraf@suse.de>
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ZynqMP is using fixed clocks now that's why enabling it to be available
for drivers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable HUSH for all zynqmp boards which don't have it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Update the config.h and defconfig files for the commands that 8e3c036
converted over to Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
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Use i2c cadence DM driver for all zynqmp targets except ZCU102
because I2C muxes and PCA953x are not supported in the tree yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Support ZynqMP zc1751 with DC cards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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