Age | Commit message (Collapse) | Author | |
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2019-01-07 | configs: Resync with savedefconfig | Tom Rini | |
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com> | |||
2018-10-16 | arm: zynq: Add support for DLC20 board | Michal Simek | |
Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |