Age | Commit message (Collapse) | Author |
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U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem to happen in the future,
use CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot
proper will use the dts setting to do the IOMUX init, and a separate dts
is needed for px30-firefly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The Macro has update without update the defconfig, update the defconfig
to make Mcaro correct.
Fixes: ec4fafdf1f ("rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to...")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Upstream kernel and rockchip kernel has default enable PSCI which needs
OPTEE in trust word, enable OPTEE support for evb by default and SPL_FIT
option to pack OPTEE with U-Boot proper.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The OPTEE will use the ram start at 0x8400000 which make the DRAM be two
banks.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Update the SPL_STACK_R_MALLOC_SIMPLE_LEN which also including space for
STACK and the size may not enough when loding FIT image in SPL.
If the size is not enough, you can see log like this when loding FIT:
U-Boot TPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53)
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53 +0800)
Trying to boot from MMC2
And if enable the DEBUG for everyting in SPL, the log will hang at dwmmc
sending CMD16 for 'uboot' loadables binary because this step need a
large stack cost(about 0x2d00).
External data: dst=8400000, offset=72638, size=b3580
Image OS is Trusted Execution Environment
board_fit_config_name_match: rk3288-evb
Selecting config 'rk3288-evb'loadables: 'uboot'
blk_find_device: if_type=6, devnum=1: dwmmc@ff0c0000.blk, 6, 0
blk_find_device: if_type=6, devnum=1: dwmmc@ff0f0000.blk, 6, 1
Sending CMD16
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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enable ls1028ardb ugreen usb network card AX88179 and AX8817X driver
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Enable ls1028ardb usb net r8152_eth
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Enable 4-byte Fast Read command for Flexspi AHB mode
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Enable 4-byte Fast Read command for Flexspi AHB mode
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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In commit <db4080d56dec>, SPL_FSL_PBL is removed from the configs of
some LayerScape platforms. Actually, SPL_FSL_PBL is needed for SD/NAND
boot on LS1021A/LS1043A/LS1046A to create boot binary having SPL binary
in PBI format concatenated with u-boot binary. SPL_FRAMEWORK is used on
these platforms too.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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This is the first step to use DM support for the KM powerpc boards.
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CC: Mario Six <mario.six@gdsys.cc>
CC: Wolfgang Denk <wd@denx.de>
CC: Valentin Longchamp <valentin.longchamp@ch.abb.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Remove this from the board header files and move it to Kconfig. Also use
the correct default address for kmtegr1.
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Valentin Longchamp <valentin.longchamp@ch.abb.com>
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Orangepi Zero Plus 2 is an open-source single-board computer, available
in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
here, as the H5 is already supported.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply
Sync dts from linux v5.2 commit:
"ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry"
(sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b)
Commit:
"ARM: dts: sun8i: h3: Refactor the pinctrl node names"
(sha1: a4dc791974e568a15f7f37131729b1a6912f4811)
has been avoided as it breaks U-Boot build.
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
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Enable the SPI NOR SFDP support and the Microchip QSPI driver.
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the SST case, the retrieval of the ethaddr from the
SPI NOR flash.
While touching the SPI NOR logic, sync with the
sama5d27_wlsom1_ek_qspiflash_defconfig and enable
CONFIG_SPI_FLASH_SPANSION.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the SST case, the retrieval of the ethaddr from the
SPI NOR flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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Add support for coral which is a range of Apollo Lake-based Chromebook
released in 2017. This also includes reef released in 2016, since it is
based on the same SoC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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The existing work-around for positioning U-Boot in the ROM when it
actually runs from RAM still exists and there is not obvious way to change
this.
Add a proper Kconfig option to handle this case. This also adds a new bool
property to indicate whether CONFIG_SYS_TEXT_BASE exists.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Add a simple sandbox test for this uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Add a sandbox driver and PCI-device emulator for p2sb. Also add a test
which uses a simple 'adder' driver to test the p2sb functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.
Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.
Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.
This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Move BOOTP_DNS2 and PHY_TI from dra7xx_evm.h to
dra7xx_evm_defconfig.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
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https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- fix DRAM bank detection for unified binary
- fix 32bit RPi4 config
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
- First set of u-boot-atmel fixes for 2020.01 cycle:
This set includes a small fix for gpio bank names, one for removing
unused headers (also touches some other boards), and a fix for the QSPI
env read on one of the boards.
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The rpi_4_32b_defconfig states that only one DRAM bank is present. This
leads to a wrong configuration of the available DRAM. Fix this by
setting the DRAM bank config accordingly.
Fixes: 193279d784 ("RPI: Add defconfigs for rpi4 (32/64)")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-video
- fix crash and board reset when drawing RLE8 bitmaps
bigger than the framebuffer resolution
- reduce dead code in video and console uclass routines
(tested on mx53cx9020, sama5d2_xplained, stm32mp157c-ev1,
stm32f746-disco, stm32f769-disco and wandboard)
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In the initial SPI flash setup, the default bus mode being used was 3,
which is incorrect, causing a CRC error when the ENV was being read from
QSPI. Setting the default bus mode to 0 which is the correct mode.
Signed-off-by: Swapna Gurumani <swapna.gurumani@microchip.com>
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- Increase stack size to avoid a stack overflow during distro boot.
- Add hifive-unleashed-a00.dts for SIFIVE FU540.
- Add OF_SEPARATE support for SIFIVE FU540.
- Add SPL support for Andes AX25 AE350.
- Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V.
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This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.
With ae350_rv[32|64]_spl_defconfigs:
U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.
With ae350_rv[32|64]_spl_xip_defconfigs:
U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
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This would help to make the necessary changes in drivers and device trees
in U-Boot tree itself. This feature would also be helpful to not pass
dtb during opensbi builds.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Rick Chen <rick@andestech.com>
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Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2020.01
-----------------
- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
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Many boards do not use all selected framebuffer depth
configurations, for such boards there is some unused
code in video and console uclass routines. Make depth
specific code optional to avoid dead code and slightly
reduce binary size. Also make ANSI code optional for
the same reason. When i.e. using only VIDEO_BPP16 the
code size shrinks (below values when using gcc-7.3.0):
$ ./tools/buildman/buildman -b video-wip -sS wandboard
...
01: Merge git://git.denx.de/u-boot-sh
02: video: add guards around 16bpp/32bbp code
03: video: make BPP and ANSI configs optional
arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rockchip pwm driver update to support all the SoCs
- RK3308 GMAC and pinctrl support
- More UART interface support on PX30 and pmugrf reg fix
- Fixup on misc for eth_addr/serial#
- Other updates on variant SoCs
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The fitImage support was enabled in the downstream U-Boot port and the
kernel images on the device are fitImage, yet this functionality is not
enabled in mainline U-Boot. Enable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
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Convert the board to ethernet DM support. Adjust board file accordingly,
as the board_eth_init() contains custom clock configuration required for
this board to work. Furthermore, enable FEC1 clock to make FEC1 work as
well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
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