Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-03-30 | use correct at91rm9200 register name | David Brownell | |
This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> | |||
2005-10-05 | Set the AT91RM9200 clock to asynchronous mode | Wolfgang Denk | |
Patch by Anders Larsen, 03 May 2005 | |||
2005-10-05 | Set the AT91RM9200 clock to synchronous mode | Wolfgang Denk | |
Patch by Anders Larsen, 29 Apr 2005 | |||
2005-04-06 | Patch by Steven Scholz, 06 Apr 2005: | wdenk | |
- creating SoC subdir for Atmel AT91RM9200 cpu/arm920t/at91rm9200 - moving code out of cpu/at91rm9200 into cpu/arm920t/at91rm9200 |