Age | Commit message (Collapse) | Author |
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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caused by missing dcache status/enable/disable functions.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
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Patch by Peter Pearse, 2 Feb 2005
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Declare reset_cpu() in include/common.h instead locally
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ARM memory layout fixes: the abort-stack is now set up in the
correct RAM area, and the BSS is zeroed out as it should be.
Furthermore, the magic variables 'armboot_end' and 'armboot_end_data'
of the linker scripts are replaced by '__bss_start' and '_end',
resp., which is a further step to eliminate unnecessary differences
between the implementation of the CPU architectures.
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Move most of the timer interrupt related PPC code to ppc_lib/interrupts.c
* Patch by Anders Larsen, 17 Sep 2003:
Bring ARM memory layout in sync with the documentation:
stack and malloc-heap are now located _below_ the U-Boot code
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fix TI Innovator/OMAP1510 pin configs
* Patches by Kshitij, 18 Aug 2003
- add support for arm926ejs cpu core
- add support for TI OMAP 1610 Innovator Board
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