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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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The compiler will help find mismatches between printf formats and
arguments if you let it. This patch adds the necessary attributes to
declarations in include/common.h, then begins to correct the resulting
compiler warnings. Some of these were bugs, e.g., "$d" instead of
"%d" and incorrect arguments. Others were just annoying, like
int-long mismatches on a system where both are 32 bits. It's worth
fixing the annoying errors to catch the real ones.
Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
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Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible. Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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From: Ed Swarthout <Ed.Swarthout@freescale.com>
Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.
Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.
Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl
Move additional code from .text to boot page to make room for
exception vectors at start of image.
Handle Machine Check, External and Critical exceptions.
Fix e500 machine check error determination in traps.c
TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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- support larger DDR memories up to 2G on the PC8540/8560ADS and
STXGP3 boards
- Made MPC8540/8560ADS be 33Mhz PCI by default.
- Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
and CONFIG_L2_INIT_RAM options.
- Refactor Local Bus initialization out of SDRAM setup.
- Re-implement new version of LBC11/DDR11 errata workarounds.
- Moved board specific PCI init parts out of CPU directory.
- Added TLB entry for PCI-1 IO Memory
- Updated README.mpc85xxads
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- update board/emk tree; use common flash driver
- Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c
[adapted for other PPC CPUs -- wd]
- Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c
* Patch by Jon Diekema, 13 Feb 2004:
Call show_boot_progress() whenever POST "FAILED" is printed.
* Patch by Nishant Kamat, 13 Feb 2004:
Add support for TI OMAP1610 H2 Board
Fixes for cpu/arm926ejs/interrupt.c
(based on Richard Woodruff's patch for arm925, 16 Oct 03)
Fix for a timer bug in OMAP1610 Innovator
Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2
* Patches by Stephan Linz, 12 Feb 2004:
- add support for NIOS timer with variable period preload counter value
- prepare POST framework support for NIOS targets
* Patch by Denis Peter, 11 Feb 2004:
add POST support for the MIP405 board
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- Added Motorola CPU 8540/8560 support (cpu/85xx)
- Added Motorola MPC8540ADS board support (board/mpc8540ads)
- Added Motorola MPC8560ADS board support (board/mpc8560ads)
* Minor code cleanup
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