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This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Changed the code to read the registers and calculate the clock
rates, rather than using a "switch" statement.
Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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e500v2 and newer cores support 1G page sizes.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Enable single-bit error counter when memory was cleared by ddr controller.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
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* Cleaned up the TSR[WIS] clearing
* Cleaned up DMA initialization
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Recognize new SVR values, and add a few register definitions
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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The following patch fixes the e500 v2 core reset bug.
For e500 v2 core, a new reset control register is added to reset the
processor.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
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Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
entry number to control the loop. This can reduce the potential risk
for the 85xx processor increasing its TLB adn LAW entry number.
Signed-off-by: Swarthout Edward <swarthout@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
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Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Matthew McClintock <msm@freescale.com>
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and reformat a bit nicer.
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Based on patch by Mike Frysinger, 20 Jun 2006
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Conflicts:
board/stxxtc/Makefile
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Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
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* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Loeliger 17-Jan-2006
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
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Simplify TQM85xx Makefile handling.
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Patch by Stefan Roese, 07 Nov 2005
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Patch by Matt ?? <kb9200_dev@kwikbyte.com>, 27 Apr 2005
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Patch by Kylo Ginsberg, 13 Apr 2005
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routed to the Watchdog handler
Patch by Eugene Surovegin, 18 Jun 2005
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- C++ comments
- Trailing white space
- Indentation not by TAB
- Excessive amount of empty lines
- Trailing empty lines
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Add Xianghua Xiao and Lunsheng Wang's support for the
GDA MPC8540 EVAL board.
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Move the TSEC driver out of cpu/mpc85xx as it will be shared
by the upcoming mpc83xx family as well.
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Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
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Determine L2 Cache size dynamically on 85XX boards.
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- Convert the CPM2 based functionality to use new CONFIG_CPM2
option rather than a myriad of CONFIG_MPC8560-like variants.
Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
Eliminates the CONFIG_MPC8560 option entirely. Distributes the
new CONFIG_CPM2 option to each 8260 board.
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PM520 boards.
Fix PHY address for canmb board.
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- fix clock rates
- remove debug messages
- fix flash sector protection
* Patch by Steven Scholz, 07 Apr 2005:
Fix warning in cpu/arm920t/at91rm9200/i2c.c
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Add support for VoiceBlue board.
* Patch by Ladislav Michl, 05 Apr 2005:
Fix netboot_common() prototypes.
* Cleanup.
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Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC
* Patch by Martin Krause, 04 Apr 2005:
Update default configuration for CMC_PU2 board.
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- Add support for MicroSys CPU87 board
- Add support for MicroSys PM854 board
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- use TQM5200_auto as MAKEALL target for TQM5200 systems
- add support for SM501 graphics controller
- add support for graphic console on TQM5200
- add support for TQM5200 Rev 200
- cleanup, fix typo in include/configs/TQM5200.h
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- Change the name of the Ethernet driver: MOTO ENET -> ENET
- Reformat boot messages
- Enable redundant environment
- Replace the -O2 optimization flag with -mno-string
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Restore copyright statements in OHCI drivers.
* Add support for TQM8540 board
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- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
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- Fix PCI window on MPC85xx; remove unneeded PCI initialization
from board_early_init_f()
- Provide SW workaround for PCI initialization on 85xx CDS
- Convert MPC85xxADS to use common CFI flash driver
* Cleanup: avoid compiler warnings
* Add CMC PU2 board to MAKEALL script
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Fix MPC85xx I2C driver
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- support larger DDR memories up to 2G on the PC8540/8560ADS and
STXGP3 boards
- Made MPC8540/8560ADS be 33Mhz PCI by default.
- Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
and CONFIG_L2_INIT_RAM options.
- Refactor Local Bus initialization out of SDRAM setup.
- Re-implement new version of LBC11/DDR11 errata workarounds.
- Moved board specific PCI init parts out of CPU directory.
- Added TLB entry for PCI-1 IO Memory
- Updated README.mpc85xxads
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