summaryrefslogtreecommitdiff
path: root/cpu/mpc86xx/spd_sdram.c
AgeCommit message (Collapse)Author
2008-02-18mpc86xx: Fix unused variable 'config' and 'immap'Jean-Christophe PLAGNIOL-VILLARD
and remove useless CONFIG_DDR_INTERLEAVE Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-01-2486xx: Remove old-style law setup codeBecky Bruce
This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-2486xx: Support new law setup method and convert mpc8641Becky Bruce
Adds the support code in cpu/mpc86xx for the new law setup code recently created fsl_law.c, and changes the MPC8641HPCN config to use this code. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-1086xx: Support 2GB DIMMsBecky Bruce
Configure the number of bits used to address the banks inside the SDRAM device. The default register value of 0 means 2 bits to address 4 banks. Higher capacity devices like a 2GB DIMM require 3 bits to address 8 banks. Signed-off-by: Becky Bruce <bgill@freescale.com>
2007-11-18Fix compiler warnings for PPC systems. Update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-11-1786xx: Fix broken variable reference when #def DEBUGing.Jon Loeliger
Sometimes you can't reference the DDR2 controller variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-10-1686xx: Allow for fewer DDR slots per memory controller.Jon Loeliger
As a direct correlation exists between DDR DIMM slots and SPD EEPROM addresses used to configure them, use the individually defined SPD_EEPROM_ADDRESS* values to determine if a DDR DIMM slot should have its SPD configuration read or not. Effectively, this now allows for 1 or 2 DIMM slots per memory controller. Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-05-01Rewrote picos_to_clk() to avoid rounding errors.James Yang
Clarified that conversion is to DRAM clocks rather than platform clocks. Made function static to spd_sdram.c. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-03-22Add support for 8641 Rev 2 silicon.Ed Swarthout
Without this patch, I am unable to get to the prompt on rev 2 silicon. Only set ddrioovcr for rev1. Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-27MPC86xx: Cleaned up unused and conditionally used local variables.Jon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-10Coding style changes to remove local varible blocksJon Loeliger
and reformat a bit nicer.
2006-09-29Fix missing tCycle/modfreq calculation.John Traill
Signed-off-by: John Traill <john.traill@freescale.com>
2006-08-29Remove bogus msync and use volatile asm.Jon Loeliger
2006-08-09Fix caslat calculationJohn Traill
Signed-off-by: John Traill <john.traill@freescale.com>
2006-05-30Fix two SDRAM setup bugs.Haiying Wang
Fix ECC setup bug. Enable 1T/2T based on number of DIMMs present. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-19Enable dual DDR controllers and interleaving.Jon Loeliger
2006-04-27Cleanup whitespaces and style issues.Jon Loeliger
Removed //-style comments. Use 80-column lines. Remove trailing whitespace. Remove dead code and debug cruft.
2006-04-26Initial support for MPC8641 HPCN board.Jon Loeliger
generated by cgit (git 2.34.1) at 2025-01-28 08:43:30 +0000