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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Change return values of init() functions in all Ethernet drivers to conform
to the following:
>=0: Success
<0: Failure
All drivers going forward should return 0 on success. Current drivers that
return 1 on success were left as-is to minimize changes.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-By: Timur Tabi <timur@freescale.com>
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This patch fixes several issues at least on a MPC885 based system with two
FEC interfaces used in MII mode.
1. PHY discovery should first read PHY_PHYIDR2 register and only then
PHY_PHYIDR1 like cpu/mpc8xx/fec.c::mii_discover_phy() does it,
otherwise the values read are wrong. Also notice, that PHY discovery
cannot work on MPC88x / MPC87x in setups with both FECs active at all
in its present form, because for both interfaces the registers from FEC
1 are used to communicate over MII.
2. Remove code duplication for resetting the FEC by isolating it into a
separate function.
3. Initialize MII on FEC 1 when communicating over FEC 2 in fec_init().
4. Optimize mii_init() to only reset the FEC 1 controller once.
5. Fix a typo in mii_init() using index i instead of j thus potentially
leading to unpredictable results.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Patch by Martin Krause, 20 Mar 2006
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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All MII configuration is done via FEC1 registers. But MII_SPEED was
configured according to FEC used. So if only FEC2 was used, this caused
the real MII_SPEED register in FEC1 to stay uninitalised, what lead
to "mii_send STUCK!" messages. Fix: always configure MII_SPEED on FEC1
only.
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Patch by Markus Klotzbuecher, 12 Jul 2006
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- Intracom board update.
- Add Codec POST.
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- Rename DUET_ADS to MPC885ADS
- Rename CONFIG_DUET to CONFIG_MPC885_FAMILY
- Rename CONFIG_866_et_al to CONFIG_MPC866_FAMILY
- Clean up FADS family port to use the new defines
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* Fix PHY discovery problem in cpu/mpc8xx/fec.c (introduced by
patches by Pantelis Antoniou, 30 Mar 2004)
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* Patch by Rune Torgersen, 16 Apr 2004:
LBA48 fixes
* Patches by Pantelis Antoniou, 16 Apr 2004:
- Fix some compile problems;
add "once" functionality for the netretry variable
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- add support for a new version of an Intracom board and fix
various other things on others.
- add verify support to the crc32 command (define
CONFIG_CRC32_VERIFY to enable it)
- fix FEC driver for MPC8xx systems:
1. fix compilation problems for boards that use dynamic
allocation of DPRAM
2. shut down FEC after network transfers
- HUSH parser fixes:
1. A new test command was added. This is a simplified version of
the one in the bourne shell.
2. A new exit command was added which terminates the current
executing script.
3. Fixed handing of $? (exit code of last executed command)
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Improve and fix various things in the MPC8xx FEC driver:
1. The new 87x and 88x series of processors have two FECs,
and the new driver supports them both.
2. Another change in the 87x/88x series is support for
the RMII (Reduced MII) interface. However numerous
changes are needed to make it work since the PHYs
are connected to the same lines. That means that
you have to address them correctly over the MII
interface.
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* Patch by Scott McNutt, 02 Jan 2004:
Add support for the Nios Active Serial Memory Interface (ASMI)
on Cyclone devices
* Patch by Andrea Marson, 16 Dec 2003:
Add support for the PPChameleon ME and HI modules
* Patch by Yuli Barcohen, 22 Dec 2003:
Add support for Motorola DUET ADS board (MPC87x/88x)
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allow mkimage to build and run on Cygwin-hosted systems
* Patch by Frank Müller, 18 Sep 2003:
use bi_intfreq instead of bi_busfreq to compute fec_mii_speed in
cpu/mpc8xx/fec.c
* Patch by Pantelis Antoniou, 16 Sep 2003:
add tool to compute fileds in the PLPRCR register for MPC86x
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add delay to get I2C working with "imm" command and s3c24x0_i2c.c
* Patch by Richard Woodruff, 17 July 03:
- Fixed bug in OMAP1510 baud rate divisor settings.
* Patch by Nye Liu, 16 July 2003:
MPC860FADS fixes:
- add MPC86xADS support (uses MPC86xADS.h)
- add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
o PLPRCR changes
o BRG changes (EXTAL/XTAL restricted to 10MHz)
o don't trust gclk() software measurement by default, depend on
CONFIG_8xx_GCLK_FREQ
- add DRAM SIMM not installed detection
- use more "correct" SDRAM initialization sequence
- allow different SDRAM sizes (8xxADS has 8M)
- default DER is 0
- remove unused MAMR defines from FADS860T.h (all done in fads.c)
- rename MAMR/MBMR defines to be more consistent. Should eventually
be merged into MxMR to better reflect the PowerQUICC datasheet.
* Patch by Yuli Barcohen, 16 Jul 2003:
support new Motorola PQ2FADS-ZU evaluation board which replaced
MPC8260ADS and MPC8266ADS
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- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
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Add "-n" to linker options to get rid of "Not enough room for
program headers" problem
* Patch by David Müller, 05 Nov 2002
Rename CONFIG_PLL_INPUT_FREQ to CONFIG_SYS_CLK_FREQ
so we can use an already existing name
* Patch by Pierre Aubert, 05 Nov 2002
Hardware related improvements in FDC boot code
* Patch by Holger Schurig, 5 Nov 2002:
Make the PXA really change it's frequency
* Patch by Pierre Aubert, 05 Nov 2002
Add support for slave serial Spartan 2 FPGAs
* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet
drivers
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