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2007-08-10cpu/86xx fixes.Jon Loeliger
Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-10mpc83xx: Consolidate the ECC support of 83xxDave Liu
Remove the duplicated source code of ecc command on the <board>.c, for reused, move these code to cpu/mpc83xx directory. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: Correct the burst length for DDR2 with 32 bitsDave Liu
The burst length should be 4 for DDR2 with 32 bits bus Signed-off-by: Dave Liu <daveliu@freescale.com>
2007-08-10mpc83xx: fixup generic pci for libfdtKim Phillips
add libfdt support to the generic 83xx pci code Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: fix 8360 and cpu functions to update fdt being passedKim Phillips
..and not the global fdt. Rename local fdt vars to blob so as not to be confused with the global var with the same three-letter name. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: Fix errors when CONFIG_OF_LIBFDT is enabledJerry Van Baren
Several node strings were not correct (trailing slashes and properties in the strings) Added setting of the timebase-frequency. Improved error messages and use debug() instead of printf(). Signed-off-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: Replace fdt_node_offset() with fdt_find_node_by_path().Jerry Van Baren
The new name matches more closely the kernel's name, which is also a much better description. These are the mpc83xx changes made necessary by the function name change. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: Add support for the display of reset statusDave Liu
83xx processor family has many reset sources, such as power on reset, software hard reset, software soft reset, JTAG, bus monitor, software watchdog, check stop reset, external hard reset, external software reset. sometimes, to figure out the fault of system, we need to know the cause of reset early before the prompt of u-boot present. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10Update SCCR programming in cpu_init_f() to support all 83xx processorsTimur Tabi
Update the cpu_init_f() function in cpu/mpc83xx/cpu_init.c to program the bitfields for all 83xx processors. The code to update some bitfields was compiled only on some processors. Now, the bitfields are programmed as long as the corresponding CFG_SCCR option is defined in the board header file. This means that the board header file should not define any CFG_SCCR macros for bitfields that don't exist on that processor, otherwise the SCCR will be programmed incorrectly. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: Add support for 8360 silicon revision 2.1Lee Nipper
This change adds 8360 silicon revision 2.1 support to u-boot. Signed-off-by: Lee Nipper <lee.nipper@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-08Coding style cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-08Port enabled for I2C signals and chipselects port configuration.TsiChungLiew
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-08Added uart_gpio_conf() in serial_init(), seperated uart port configuration ↵TsiChungLiew
from cpu_init() to uart_gpio_conf() Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-07Merge with git://www.denx.de/git/u-boot.gitMarkus Klotzbuecher
2007-08-07Merge with /home/tur/git/u-boot#cm5200-siWolfgang Denk
2007-08-06Merge with /home/wd/git/u-boot/custodian/u-boot-testingWolfgang Denk
2007-08-06Coding style cleanup. Update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-06Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk
2007-08-06Make MPC8641's PCI/PCI-E driver a common driver for many FSL parts.Ed Swarthout
All of the PCI/PCI-Express driver and initialization code that was in the MPC8641HPCN port has now been moved into the common drivers/fsl_pci_init.c. In a subsequent patch, this will be utilized by the 85xx ports as well. Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added. Also enable the second PCI-Express controller on 8641 by getting its BATS and CFG_ setup right. Fixed a u16 vendor compiler warning in AHCI driver too. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-03cm1_qp1 -> cm5200: single U-Boot image for modules from the cm5200 family.Bartlomiej Sieka
Add the ability for modules from the Schindler cm5200 family to use a single U-Boot image: - rename cm1_qp1 to cm5200 - add run-time module detection - parametrize SDRAM configuration according to the module we are running on Few minor, board-specific fixes included in this patch: - better MAC address handling - updated default environment ('update' command uses +{filesize} now) - improved error messages in the auto-update code - allow booting U-Boot from RAM (CFG_RAMBOOT) Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2007-08-03Merge branch 'testing' into workingAndy Fleming
Conflicts: CHANGELOG fs/fat/fat.c include/configs/MPC8560ADS.h include/configs/pcs440ep.h net/eth.c
2007-08-02Coding style cleanup, update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-02ppc4xx: Code cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-02[ppc440SPe] Graceful recovery from machine check during PCIe configurationGrzegorz Bernacki
During config transactions on the PCIe bus an attempt to scan for a non-existent device can lead to a machine check exception with certain peripheral devices. In order to avoid crashing in such scenarios the instrumented versions of the config cycle read routines are introduced, so the exceptions fixups framework can gracefully recover. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Acked-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02[ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.ARafal Jaworowski
This brings back separate settings for PCIe bus numbers depending on chip revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa commit. 440SPe rev. A does NOT work properly with the same settings as for the rev. B (no devices are seen on the bus during enumeration). Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02Fix build errors and warnings / code cleanup.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-31ppc4xx: Update AMCC Bamboo 440EP supportEugene OBrien
Changed storage type of cfg_simulate_spd_eeprom to const Changed storage type of gpio_tab to stack storage (Cannot access global data declarations in .bss until afer code relocation) Improved SDRAM tests to catch problems where data is not uniquely addressable (e.g. incorrectly programmed SDRAM row or columns) Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules Fixed AM29LV320DT (OpCode Flash) sector map Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-30ppc4xx: Only print ECC related info when the error bis are setStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-27[ADS5121] Support for the ADS5121 boardRafal Jaworowski
The following MPC5121e subsystems are supported: - low-level CPU init - NOR Boot Flash (common CFI driver) - DDR SDRAM - FEC - I2C - Watchdog Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Jan Wrobel <wrr@semihalf.com>
2007-07-26ppc4xx: Add support for AMCC 405EP Taihu boardJohn Otken
Signed-off-by: John Otken <john@softadvances.com>
2007-07-20ppc4xx: Fix bug with default GPIO output valueStefan Roese
As spotted by Matthias Fuchs, the default output values for all GPIO1 outputs were not setup correctly. This patch fixes this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-07-16Merge with /home/stefan/git/u-boot/u-boot-coldfire-freescaleStefan Roese
2007-07-16ppc4xx: Code cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16ppc4xx: Add new weak functions to support boardspecific DDR2 configurationStefan Roese
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better support non default, boardspecific DDR(2) controller configuration. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16ppc4xx: Add remove_tlb() function to remove a mem area from TLB setupStefan Roese
The new function remove_tlb() can be used to remove the TLB's used to map a specific memory region. This is especially useful for the DDR(2) setup routines which configure the SDRAM area temporarily as a cached area (for speedup on auto-calibration and ECC generation) and later need this area uncached for normal usage. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-12ppc4xx: Change receive buffer handling in the 4xx emac driverStefan Roese
This change fixes a bug in the receive buffer handling, that could lead to problems upon high network traffic (broadcasts...). Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-12Update CHANGELOG, minor coding style cleanup.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-12Merge with /home/tur/git/u-boot#cm1_qp1Wolfgang Denk
2007-07-11CM1.QP1: Support for the Schindler CM1.QP1 board.Bartlomiej Sieka
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2007-07-10Merge branch 'master' into u-boot-5329-earlyJohn Rigby
2007-07-10Cache update and added CFG_UNIFY_CACHETsiChung
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only. Signed-off-by: TsiChung <tcliew@Goku.(none)>
2007-07-10Create interrupts.c and modify MakefileTsiChungLiew
interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10Enable IcacheTsiChungLiew
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10Update header file and some clean upTsiChungLiew
Replaced immap_5329.h and m5329.h with immap.h. Removed whitespaces. Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10Update header file and enable icacheTsiChungLiew
Replaced immap_5329.h and m5329.h with immap.h. Enabled icache_enable() in cpu_init_r(). Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10Update header file and removed interrupt_init()TsiChungLiew
Replace immap_5329.h and m5329.h with immap.h. Removed interrupt_init() and placed it in interrupts.c Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.Jon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-09cpu/m*: Remove obsolete references to CONFIG_COMMANDSJon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-09cpu/[7a-ln-z]*: Remove obsolete references to CONFIG_COMMANDSJon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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