Age | Commit message (Collapse) | Author |
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M5271 dynamic clock multiplier. It is currently fixed at 100MHz.
Allow the board header file to set their own multiplier and divider.
Added the #define for the multiplier and divider to the cpu header file.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
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Discontinue the use of CONFIG_SYS_FECI2C (only used by M5271EVB).
Use read-modify-write to activate the FEC pins without disabling I2C.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
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Added the CONFIG_M5271 to the list of Coldfire V2 processor. This
was causing the bus clock (not CPU clock) to be declared twice as
fast as it actually is. This causes UARTS to operate at half the
specified baudrate.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
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Take the cache flush functions from the kernel as they use hardware loops in
order to get optimal performance.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Start building all Blackfin boards with -ffunction-sections/-fdata-sections
and linking with --gc-sections.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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need by arm-elf toolchains and no impact on the arm-linux one
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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instead the board will have to load it from flash or ram
which will be specified by npe_ucode env var
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Rather than forcing people to define a custom "LITTLEENDIAN", just use the
__LITTLE_ENDIAN one from the Linux byteorder headers that every arch is
already setting up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some devices have no UART device pulled out, so allow people to disable the
driver completely in favor of other methods (like JTAG-console).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin JTAG has the ability to pass data via a back-channel without
halting the processor. Utilize that channel to emulate a console.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Workaround fun new anomalies related to software reset of the processor.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we save the value of RETX at power on and then pass it on to the
kernel so that it can nicely debug a "double-fault-caused-a-reset" crash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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People often ask questions about the init process and when things go
from flash to relocated base, so clarify the comments a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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No need to set the SP register indirectly to the configured value when it
can be set directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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As pointed out by Ivan Koryakovskiy, the initialization code was not
actually respecting the CONFIG_CLKIN_HALF option when configuring the
PLL_CTL register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than using a local custom memcpy function, just call the existing
optimized Blackfin version.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The current Blackfin i2c driver does not work properly with certain devices
due to it breaking up transfers incorrectly. This is a rewrite of the
driver and relocates it to the newer place in the source tree.
Also remove duplicated I2C speed defines in Blackfin board configs and
disable I2C slave address usage since it isn't implemented.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Our dcache invalidate function doesn't just invalidate, it also flushes.
So rename the function accordingly and fix the dma_memcpy() function so it
doesn't inadvertently corrupt the data destination.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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This patch adds flush_/invalidate_dcache_range() to the MIPS architecture.
Those functions are needed for the upcoming dcache support for the USB
EHCI driver. I chose this API because those cache handling functions are
already present in the PPC architecture.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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Added support for a second memory bank to DDR autodetection for 440
platforms.
Made hardcoded values configurable.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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This change is needed for mgcoge because it uses two ethernet drivers.
Add a check for the presence of the PIGGY board on mgcoge. Without this
board networking cannot work and the initialization must be aborted.
Only allocate rtx once to prevent DPRAM exhaustion.
Initialize ether_scc.c and the keymile-specific HDLC driver (to be added
soon) in eth.c.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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sh_eth used old network API. This patch changed new API.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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The NMDK8815 board is distributed by ST Microelectornics.
Other (proprietary) code must be run to unlock the CPU before
U-Boot runs. doc/README.nmdk8815 outlines the boot sequence.
This is the initial port, with basic infrastructure and
a working serial port.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Add common board, interrupt and system info code.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
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Add common clock, memory and low level code
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
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Add common cpu and start code.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
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CONFIG_SC520 is now used for conditional compile
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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Reset function specific to AMD SC520 microcontroller - Is more of a
'hard reset' that the triple fault.
Requires CONFIG_SYS_RESET_SC520 to be defined in config
I would have liked to add this to a new file (cpu/i386/sc520/reset.c)
but ld requires that a object file in a library arhive MUST contain
at least one function which does not override a weak function (and is
called from outside the object file) in order for that object file to
be extracted from the archive. This would be the only function on the
new file, and hence, will never get linked in.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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Moved from interrupts.c to cpu.c and made into a weak function to
allow vendor specific override
Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be
added to the vendor specific code without the need to remember to
#undef usage of the generic method and if you forget to include your
custom reset method, you will always get the default.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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This allows for future tidy ups and functionality that will require
set_vector ()
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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Brings i386 in line with other CPUs with a reset vector and frees up reset.c
for CPU reset functions
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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