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This is needed for the upcoming esd MECP5123 board port which uses
I2C EEPROM for environment storage.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Acked-by: Heiko Schocher<hs@denx.de>
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The following patch reorganizes/reworks the USB support for mpc83xx
as under:-
* Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to
cpu/mpx83xx/cpu_init.c
* Board specific usb_phy_type is read from the environment
* Adds USB EHCI specific structure in include/usb/ehci-fsl.h
* Copyrights revamped in most of the following files
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
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Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This patch removes the duplicated code for baudrate generator configuration
in the PSC serial_init() implementation by calling serial_setbrg() instead
of duplicating the code.
Signed-off-by: Stefan Roese <sr@denx.de>
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The wrong input frequency was used in serial_setbrg(). This patch fixes
this by using ips_clk as input frequency for the PSC baudrate generator.
Signed-off-by: Stefan Roese <sr@denx.de>
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Move needed definitions (register descriptions etc.) from
include/mpc512x.h into include/asm-ppc/immap_512x.h.
Instead of using a #define'd register offset, use a function that
provides the PATA controller's base address.
All the rest of include/mpc512x.h are register offset definitions
which can be eliminated by proper use of C structures.
There are only a few register offsets remaining that are needed in
cpu/mpc512x/start.S; for these we provide cpu/mpc512x/asm-offsets.h
which is intended as a temporary workaround only. In a later patch
this file will be removed, too, and then auto-generated from the
respective C structs.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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This commit changes the MPC512x code to use I/O accessor calls (i.e.
out_*() and in_*()) instead of using deprecated pointer accesses.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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- add GPIO module description
- add Address Latch Timing Register description
- add IO Control Memory Map
- add FEC Memory Map
Also change board/freescale/mpc5121ads/mpc5121ads.c and
cpu/mpc512x/iopin.c as needed.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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Get rid of variable declaration in the middle of the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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We will soon see several new MPC521x based boards added. This patch
moves files that are not board specific to a common directory so they
can be shared by all such ports. It also splits off common IDE code
into a new file, cpu/mpc512x/ide.c .
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
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Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.
Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.
This patch cleans this up - for example:
Before:
=> help dtt
dtt - Digital Thermometer and Thermostat
Usage:
dtt - Read temperature from digital thermometer and thermostat.
After:
=> help dtt
dtt - Read temperature from Digital Thermometer and Thermostat
Usage:
dtt
Signed-off-by: Wolfgang Denk <wd@denx.de>
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The kernel stores address<->symbol names in it so things can be decoded at
runtime. Do it in U-Boot, and we get nice symbol decoding when crashing.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The function and interface clocks for each GPIO bank, except the first, must
be explicitly turned on. These are controlled by the config level defines
CONFIG_OMAP3_GPIO_n where n is from 2 to 6.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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move s3c44b0 to arch_cpu_init and as noone use cpu_init remove it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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all arm init the IRQ stack the same way
so unify it in lib_arm/interrupts.c and then call arch specific interrupt init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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all arm boards except a few use the same cpu linker script
so move it to cpu/$(CPU)
that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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uses PA10, PA11 for ETX2 and ETX3.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Once the Davinci watchdog has been enabled, the timeout
value cannot be changed. If the timeout in use is long,
it can take a long time for card to reset. By writing
an invalid service key, we can trigger an immediate reset.
Signed-off-by: Thomas Lange <thomas@corelatus.se>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Port version 2.6.27 of the linux kernel's omap gpio interface to u-boot.
The orignal source is in linux/arch/arm/plat-omap/gpio.c
See doc/README.omap3 for instructions on use.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
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The u-boot.lds is common for all DaVinci boards. The patch removes
multiple instances and moves the u-boot.lds to /cpu/arm926ejs/davinci
folder. This addresses one of the comments i received while submitting
patches for DM3xx
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The u-boot.lds file is common for all omap boards.
Move a cleaned up version to the cpu layer and add makefile logic to use it.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Move the clock-rate dumping code into the cpu/.../davinci area
where it should have been, enabled by CONFIG_DISPLAY_CPUINFO,
updating the format and showing the DSP clock (where relevant).
Switch boards to use the cpuinfo() hook for this stuff.
Remove a few now-obsolete PLL #defines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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actually the timer init use the interrupt_init as init callback
which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer
related code is moved to timer.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Reformat COBJS handling.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
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Remove duplicated interrupt code. Original, identical code can be found
in lib_arm/interrupts.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Add some basic declarations for DaVinci DM355/DM350/DM335 support,
keyed on CONFIG_SOC_DM355. (DM35X isn't quite right because the
DM357 is very different; while the DM355 is like a DM355 without
the MPEG/JPEG coprocessor).
These have different peripherals than the DM6446, and some of
the peripherals are at different addresses. Notably for U-Boot,
there's no EMAC, and the NAND controller address is different
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Fix two buglets in the dm644x support: don't set two must-be-zero
bits in the UART management register; and only include the I2C hooks
if the I2C driver is being included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Split out DaVinci DM6446-specific bits from more generic bits:
- Add a CONFIG_SOC_DM644X. All current boards use DM6446 chips;
DM6443 and DM6441 chips differ in available peripherals.
- Move most DM644X-specific bits from psc.c to a new dm644x.c file,
which is conditionally built. It provides device-specific setup.
Plus minor coding style and comment updates with respect to the PSC.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax.
Add the first conditional: for EMAC driver support. Not all
chips have an EMAC; and boards might not use it, anyway.
This doesn't touch PHY configuration; that should eventually
become conditional too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Move DaVinci PSC support from board/* to cpu/* where it belongs.
The PSC module manages clocks and resets for all DaVinci-family
SoCs, and isn't at all board-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Don't needlessly include lowlevel init code; that's only really
needed with boot-from NOR (not boot-from-NAND). The 2nd stage
loader (UBL) handles that before it loads U-Boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").
Here the commands to load and start this image from the BDI2000:
440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000
Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.
Signed-off-by: Stefan Roese <sr@denx.de>
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New default, weak i2c_get_bus_speed() and i2c_set_bus_speed() functions
replace a number of architecture-specific implementations.
Also, providing default functions will allow all boards to enable
CONFIG_I2C_CMD_TREE. This was previously not possible since the
tree-form of the i2c command provides the ability to display and modify
the i2c bus speed which requires i2c_[set|get]_bus_speed() to be
present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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Many boards/controllers/drivers don't support an I2C slave interface,
however CONFIG_SYS_I2C_SLAVE is used in common code so provide a
default
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.
Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.
This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have. Its only the LAW
setup that limits what is visible to the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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