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2020-07-13README: davinci: Clarify when SPL is used and the target devices.Adam Ford
The documentation states that SPL is enabled in all config options for the da850. This incorrect, because devices booting from NOR do not need the SPL to do the low level initializion because when booting from NOR, the board is able to execute in place (XIP) This also clarifies that SPL isn't only used for booting from SPI, because it is also used for booting from MMC and NAND for those devices supporting those boot options. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-03README: davinci: update the documentation for DaVinciBartosz Golaszewski
The DM* family of SOCs is no longer supported. We now support the omap-l138 lcdk board and Lego EV3 platform. Reflect those changes in the README. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com>
2011-12-24arm, da850evm: Add an SPL for SPI bootChristian Riesch
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
2011-09-30arm, davinci: add NOR Boot Configuration WordHeiko Schocher
to add the "NOR Boot Configuration Word" on AM18xx based boards, define CONFIG_SYS_DV_NOR_BOOT_CFG. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-11-19DA850 EVM: passing maximum clock rate information to kernelSekhar Nori
The TI DA850/OMAP-L138/AM18x EVM can be populated with devices having different maximum allowed CPU clock rating. The maximum clock the chip can support can only be determined from the label on the package (not software readable). Introduce a method to pass the maximum allowed clock rate information to kernel using ATAG_REVISION. The kernel uses this information to determine the maximum cpu clock rate reachable using cpufreq. Note that U-Boot itself does not set the CPU clock rate. The CPU clock is setup by a primary bootloader ("UBL"). The rate setup by UBL could be different from the maximum clock rate supported by the device. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-11-19DA850 EVM: add information regarding DA850 in README.davinciSekhar Nori
The README.davinci in documentation folder is missing information regarding DA850 which is a supported DaVinci device. Add this information. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-27TI DaVinci: Adding a README for the DaVinci series of SOC'sSandeep Paulraj
Adding an initial README for the DaVinci series of SOC's Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>