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2019-08-11Drop PCMCIASimon Glass
This is no-longer used in U-Boot and has not been converted to driver model. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-21spl: kconfig: separate sysreset and firmware drivers from miscSimon Goldschmidt
This adds separate kconfig options for drivers/sysreset and drivers/firmware. Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL build but also added drivers/firmware and drivers/sysreset at the same time. Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for drivers/sysreset and adds CONFIG_SPL_FIRMWARE for drivers/firmware (and accordingly for the TPL options). CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into the SPL build (and accordingly for TPL) since there are boards using non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't have CONFIG_SPL_MISC enabled, so cannot use this to include drivers/misc into the SPL build. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-07-11drivers: pci_ep: Introduce UCLASS_PCI_EP uclassRamon Fried
Introduce new UCLASS_PCI_EP class for handling PCI endpoint devices, allowing to set various attributes of the PCI endpoint device, such as: * configuration space header * BAR definitions * outband memory mapping * start/stop PCI link Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-07Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- Assorted stratix10 fixes. - DDR driver DM migration.
2019-05-06ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan
Compile ALTERA_SDRAM driver in SPL only. Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-05dm: cache: Create a uclass for cacheDinh Nguyen
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-02-20x86: sandbox: pch: Add a CONFIG option for PCHSimon Glass
At present this uclass is selected only on x86. In order to add a test for it, it must also support sandbox. Create a new CONFIG_PCH option and enable it on x86 and sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-01-26dfu: Make DFU support more SPL friendlyAndrew F. Davis
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code. This ensures the files and features are only built into the right build for which they are enabled. Using the macros to simplify this patch was made possible by the config symbol rename done in the last patch. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFUAndrew F. Davis
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT to allow for cleaner use in code. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-10Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGETJean-Jacques Hiblot
The SPL option for USB gadget should be named after the option for u-boot (CONFIG_USB_GADGET) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-01Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini
imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
2019-01-01drivers: ddr: introduce DDR driver for i.MX8MPeng Fan
Introduce DDR driver for i.MX8M. The driver will be used by SPL to initialze DDR PHY and DDR Controller. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-12-14spl: drivers: Link usb common library to SPL if USB gadget is enabledJean-Jacques Hiblot
Some drivers might need to access common USB functions such as usb_get_maximum_speed() or usb_get_dr_mode(). Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12spl: fix build failure with !CONFIG_SPL_PCI_SUPPORTSekhar Nori
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but CONFIG_SPL_PCI_SUPPORT disabled, results in following linker error: lib/built-in.o: In function `fdtdec_get_pci_bar32': lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32' fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32' This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c while SPL build does not descend into drivers/pci directory in drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled. Fix this by applying appropriate #define guards in lib/fdtdec.c. It looks like ns16550.c has the same problem, so fixed that too. To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI (enables use of CONFIG_IS_ENABLED() macro). Suggested-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12blk: Rework guard around part_init callTom Rini
The function part_init() will only be built when we have both CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set. Protect the call to this function with both of these tests now. Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Behún <marek.behun@nic.cz> Cc: Vanessa Maegima <vanessa.maegima@nxp.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Adam Ford <aford173@gmail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-06dm: Add Hardware Spinlock classBenjamin Gaignard
This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-26spl: Support hash, input, pch, pci, rtc, tpm in SPLSimon Glass
At present these subsystems are only supported in U-Boot proper but it is sometimes necessary to support them in SPL, or even TPL. Update the Kconfig and Makefile to support this. Also adjust GPIO so that it can be used in TPL if required. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-14dm: Add a new uclass driver for VirtIO transport devicesBin Meng
This adds a new virtio uclass driver for “virtio” [1] family of devices that are are found in virtual environments like QEMU, yet by design they look like physical devices to the guest. The uclass driver provides child_pre_probe() and child_post_probe() methods to do some common operations for virtio device drivers like device and driver supported feature negotiation, etc. [1] http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.pdf Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-07Add UCLASS_TEE for Trusted Execution EnvironmentJens Wiklander
Adds a uclass to interface with a TEE (Trusted Execution Environment). A TEE driver is a driver that interfaces with a trusted OS running in some secure environment, for example, TrustZone on ARM cpus, or a separate secure co-processor etc. The TEE subsystem can serve a TEE driver for a Global Platform compliant TEE, but it's not limited to only Global Platform TEEs. The over all design is based on the TEE subsystem in the Linux kernel, tailored for U-Boot. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-02Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
This is the PR for SPI-NAND changes along with few spi changes. [trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-30Merge git://git.denx.de/u-boot-dmTom Rini
2018-09-29drivers: Add board uclassMario Six
Since there is no canonical "board device" that can be used in board files, it is difficult to use DM function for board initialization in these cases. Hence, add a uclass that implements a simple "board device", which can hold devices not suitable anywhere else in the device tree, and is also able to read encoded information, e.g. hard-wired GPIOs on a GPIO expander, read-only memory ICs, etc. that carry information about the hardware. The devices of this uclass expose methods to read generic data types (integers, strings, booleans) to encode the information provided by the hardware. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-28W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMsMaxime Ripard
We might want to access data stored onto one wire EEPROMs. Create a framework to provide a consistent API. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> [eugen.hristev@microchip.com: reworked patch] Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28w1: Add 1-Wire uclassMaxime Ripard
We might want to use 1-Wire devices connected on boards such as EEPROMs in U-Boot. Provide a framework to be able to do that. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> [eugen.hristev@microchip.com: reworked] Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-20mtd: move NAND files into a raw/ subdirectoryMiquel Raynal
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-11spl: Allow remoteproc drivers to be used within SPLLokesh Vutla
Add an option for building remoteproc drivers within SPL. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11spl: Allow mailbox drivers to be used within SPLLokesh Vutla
Add an option for building mailbox drivers within SPL. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-08-11drivers: Add AXI uclassMario Six
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a driver for the gdsys IHS AXI bus on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06power: Add CONFIG_SPL_POWER_DOMAIN configPeng Fan
Add CONFIG_SPL_POWER_DOMAIN config entry. Build drivers/power/domain if this config is selected. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19dm: SMEM (Shared memory) uclassRamon Fried
This is a uclass for Shared memory manager drivers. A Shared Memory Manager driver implements an interface for allocating and accessing items in the memory area shared among all of the processors. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-09reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESETLey Foon Tan
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-04Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-05-30fastboot: Extract fastboot_okay/fail to fb_common.cAlex Kiernan
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented so we can call them from a non-USB implementation. Introduce fastboot_response which takes varargs parameters so we can use it to generate formatted response strings. Refactor fastboot_okay/fail to use it. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30fastboot: Move fastboot to drivers/fastbootAlex Kiernan
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to drivers/fastboot. Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing behaviour. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-28phy: Add Allwinner A64 USB PHY driverJagan Teki
USB PHY implementation for Allwinner SOC's can be handling in to single driver with different phy configs. This driver handle all Allwinner USB PHY's start from 4I to 50I(except 9I). Currently added A64 compatibility more will add in next coming patches. Current implementation is unable to get pinctrl, clock and reset details from DT since the dm code on these will add it future. Driver named as phy-sun4i-usb.c since the same PHY logic work for all Allwinner SOC's start from 4I to A64 except 9I with different phy configurations. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-10bootcount: spl: Enable bootcount support in SPLLukasz Majewski
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been added to allow drivers/bootcount code re-usage in SPL. This code is necessary to use and setup bootcount in SPL in the case of falcon boot mode. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-19spl: add SPL_RESET_SUPPORTPatrick Delaunay
Add option to include RESET driver and uclass in SPL. That can be useful to handle IP reset with same driver in U-Boot and in SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-05spl: Kconfig: Rename SPL_USBETH_SUPPORT to SPL_USB_ETHER to match with the ↵Faiz Abbas
U-boot CONFIG Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER. This enables users to block text using CONFIG_IS_ENABLED() instead of resorting to #if ladders with SPL and non-SPL cases. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2017-11-21thermal: ti-bandgap: Add support for temperature sensorFaiz Abbas
The dra7xx series of SOCs contain a temperature sensor and an associated analog-to-digital converter (ADC) which produces an output which is proportional to the SOC temperature. Add support for this temperature sensor. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-14Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini
2017-08-13nvme: Add NVM Express driver supportZhikang Zhang
NVM Express (NVMe) is a register level interface that allows host software to communicate with a non-volatile memory subsystem. This interface is optimized for enterprise and client solid state drives, typically attached to the PCI express interface. This adds a U-Boot driver support of devices that follow the NVMe standard [1] and supports basic read/write operations. Tested with a 400GB Intel SSD 750 series NVMe card with controller id 8086:0953. [1] http://www.nvmexpress.org/resources/specifications/ Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13dm: timer: normalise SPL and TPL supportPhilipp Tomsich
To fully support DM timer in SPL and TPL, we need a few things cleaned up and normalised: - inclusion of the uclass and drivers should be an all-or-nothing decision for each stage and under control of $(SPL_TPL_)TIMER instead of having the two-level configuration with TIMER and $(SPL_TPL_)TIMER_SUPPORT - when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can not be compiled in This normalises configuration to $(SPL_TPL_)TIMER and moves the config options to drivers/timer/Kconfig (and cleans up the collateral damage to some defconfigs that had SPL_TIMER_SUPPORT enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13drivers: spl: consistently use the $(SPL_TPL_) macroPhilipp Tomsich
To simplify drivers/Makefile a bit when using TPL/SPL, we consistently use the $(SPL_TPL_) macro to test for drivers that have separate configuration symbols for the full U-boot, SPL and TPL stages. Instead of explicitly repeating them in two separate if-guarded sections of the Makefile, we can now simply list these options once. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-26drivers: Enable FPGA driver build on SPLTien Fong Chee
Enable FPGA driver build for Arria 10 SPL because FPGA driver is needed by Arria 10 SPL to configure and getting DDR up before loading U-boot into DDR and booting from there. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2017-07-11scsi: Move drivers into new drivers/scsi directorySimon Glass
At present we have the SCSI drivers in the drivers/block and common/ directories. It is better to split them out into their own place. Use drivers/scsi which is what Linux does. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11sata: Move drivers into new drivers/ata directorySimon Glass
At present we have the SATA and PATA drivers mixed up in the drivers/block directory. It is better to split them out into their own place. Use drivers/ata which is what Linux does. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-05-22Drop digital thermometer and thermostat (DTT) driversSimon Glass
This subsystem is quite old. It has been replaced with a driver-model version (UCLASS_THERMAL). Boards are free to convert to that if required, but here is a removal patch that could be applied in the meantime. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22Drop three-wire serial (TWS) supportSimon Glass
This subsystem has not been converted to driver model, there is only one driver and only one board that uses it. Drop it and its CONFIG option. Also drop the rtc4543 RTC driver since it uses TWS. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-15mmc: descend into drivers/mmc only when CONFIG_MMC is enabledMasahiro Yamada
This simplifies makefiles. Also, arrange the order of objects in drivers/mmc/Makefile so that the framework objects are listed before drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>