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path: root/drivers/clk/rockchip/clk_rk3288.c
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2017-06-09rockchip: Init clocks again when chain-loadingSimon Glass
Detect with a previous boot loader has already set up the clocks and set them up again so that U-Boot gets what it expects. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09rockchip: rk3288: Convert clock driver to use shifted masksSimon Glass
Shifted masks are the standard approach with rockchip since it allows use of the mask without shifting it each time. Update the definitions and the driver to match. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: Rename dev_addr..() functionsSimon Glass
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIOXu Ziyuan
The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: clk: rk3288: limit gpll and cpll init to SPL buildHeiko Stübner
The gpll and cpll init values are only used in rk_clk_init in the SPL and therefore produce compile time warnings in regular uboot builds. Fix that with an #ifdef. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: clk: Support setting ACLKSimon Glass
Add basic support for setting the ARM clock, since this allows us to run at maximum speed in U-Boot. Currently only a single speed is supported (1.8GHz). Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-30rockchip: rk3288: Move rockchip_get_cru() out of the driverSimon Glass
This function is called from outside the driver. It should be placed into common SoC code. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-09-22clk: rk3288: add PWM clock get rateKever Yang
This patch add clk_get_rate for PWM device. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-05rockchip: remove log2 reimplementation from clock driversHeiko Stübner
The already available ilog2 function does exactly the same in the common case than the log2 function the current clock-driver reimplement. So, simply move to that one. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-05move: rockchip: move clock drivers into a subdirectoryHeiko Stübner
With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>