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path: root/drivers/clk/sunxi/clk_a31.c
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2019-01-18clk: sunxi: Implement UART resetsJagan Teki
Implement UART resets for all relevant Allwinner SoC clock drivers via ccu reset table. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18clk: sunxi: Implement UART clocksJagan Teki
Implement UART clocks for all Allwinner SoC clock drivers via ccu clock gate table. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18clk: sunxi: Add Allwinner A31 CLK driverJagan Teki
Add initial clock driver for Allwinner A31. - Implement USB ahb1 and USB clocks via ccu_clk_gate table for A31, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB ahb1 and USB resets via ccu_reset table for A31, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>