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path: root/drivers/clk/uniphier
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2017-10-15clk: uniphier: add NAND controller clockMasahiro Yamada
This allows the NAND driver to enable clock and get its clock rate. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15clk: uniphier: add PXs3 clock dataMasahiro Yamada
Add basic clock data for Socionext's new SoC PXs3. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15clk: uniphier: rework for better clock tree structureMasahiro Yamada
U-Boot does not support fancy clock tree structures like the Linux common clock framework. Implement a simple clock tree model at the driver level. With this, the clock data will be simplified. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30clk: uniphier: add System clock supportMasahiro Yamada
Support system clocks for LD4, Pro4, sLD8, Pro5, PXs2/LD6b, LD11, LD20. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20ARM: uniphier: remove sLD3 SoC supportMasahiro Yamada
This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20clk: uniphier: fix unmet direct dependencies warningMasahiro Yamada
Since commit f0776a551764 ("spl: dm: Kconfig: SPL_CLK depends on SPL_DM"), the following warning is displayed: $ make uniphier_v8_defconfig warning: (ARCH_ZYNQ && ARCH_ZYNQMP && STM32F7 && CLK_UNIPHIER) selects SPL_CLK which has unmet direct dependencies (CLK && SPL_DM) While I am here, I am removing the prompt to make it user-unconfigurable option so that "select CLK_UNIPHIER" can be omitted. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25ARM: uniphier: fix various sparse warningsMasahiro Yamada
Fix warnings reported by sparse: - ... was not declared. Should it be static?" - cast to restricted __be32 While fixing those, the type conflict of cci500_init() was found. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-01dm: Rename dev_addr..() functionsSimon Glass
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: Use dm.h header when driver mode is usedSimon Glass
This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-29clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clockMasahiro Yamada
I missed to update them when DT files were resynced with Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-18clk: uniphier: rework UniPhier clk driverMasahiro Yamada
The initial design of the UniPhier clk driver for U-Boot was not very nice. Here is a re-work to sync it with Linux's clk and reset drivers, maximizing the code reuse from Linux's clk data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-23clk: uniphier: allow to have clock node under syscon nodeMasahiro Yamada
To sync the DT binding with Linux, the register base must be taken from the parent syscon node. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-23clk: uniphier: move U_BOOT_DRIVER entry to core codeMasahiro Yamada
Move U_BOOT_DRIVER() entry from the data file (clk-uniphier-mio.c) to the core support file (clk-uniphier-core.c) because I do not want to repeat the driver boilerplate when I add more clock data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-23clk: uniphier: constify clock data arrays/structuresMasahiro Yamada
Clarify these clock data are constant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()Masahiro Yamada
This does not have much impact on behavior, but makes code look more more like Linux. The use of devm_ioremap() often helps to delete .remove callbacks entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-19clk: convert API to match reset/mailbox styleStephen Warren
The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26clk: uniphier: add Media I/O clock driver support for PH1-LD11Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24clk: uniphier: add Media I/O clock driver support for PH1-LD20Masahiro Yamada
PH1-LD20 needs this for its SD card controller. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01clk: uniphier: use devm_get_addr() to get base addressMasahiro Yamada
Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14clk: uniphier: add Media I/O clock driver for UniPhier SoCsMasahiro Yamada
This is the initial commit for the UniPhier clock drivers. Currently, only the Media I/O clock is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>