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path: root/drivers/ddr/fsl/arm_ddr_gen3.c
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2020-05-18common: Drop linux/delay.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14Revert "drivers/ddr/fsl: Dual-license DDR driver"Tom Rini
Upon further review, not all code authors are in favour of this change. This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-09drivers/ddr/fsl: Dual-license DDR driverYork Sun
To make this driver easier to be reused, dual-license DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Tom Rini <trini@konsulko.com> CC: Heinrich Schuchardt <xypron.glpk@gmx.de> CC: Thomas Schaefer <thomas.schaefer@kontron.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Robert P. J. Day <rpjday@crashcourse.ca> CC: Alexander Merkle <alexander.merkle@lauterbach.com> CC: Joakim Tjernlund <joakim.tjernlund@transmode.se> CC: Curt Brune <curt@cumulusnetworks.com> CC: Valentin Longchamp <valentin.longchamp@keymile.com> CC: Wolfgang Denk <wd@denx.de> CC: Anatolij Gustschin <agust@denx.de> CC: Ira W. Snyder <iws@ovro.caltech.edu> CC: Marek Vasut <marek.vasut@gmail.com> CC: Kyle Moffett <Kyle.D.Moffett@boeing.com> CC: Sebastien Carlier <sebastien.carlier@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Peter Tyser <ptyser@xes-inc.com> CC: Paul Gortmaker <paul.gortmaker@windriver.com> CC: Peter Tyser <ptyser@xes-inc.com> CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass
The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun
These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
2015-02-24driver/ddr/fsl: Add support for multiple DDR clocksYork Sun
Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with exising platforms. Multiple clocks have been verifyed on LS2085A emulator. Signed-off-by: York Sun <yorksun@freescale.com>
2014-12-11fsl/sleep: updated the deep sleep framework for QorIQ platformsTang Yuantian
With the introducing of generic board and ARM-based cores, current deep sleep framework doesn't work anymore. This patch will convert the current framework to adapt this change. Basically it does: 1. Converts all the Freescale's DDR driver to support deep sleep. 2. Added basic framework support for ARM-based and PPC-based cores separately. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-09-08driver/ddr/freescale: Fix DDR3 driver for ARMYork Sun
Reading DDR register should use ddr_in32() for proper endianess. This patch fixes incorrect waiting time for ARM platforms. Signed-off-by: York Sun <yorksun@freescale.com>
2014-02-21driver/ddr: Change Freescale ARM DDR driver to support both big and little ↵York Sun
endian Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: Add Freescale DDR driver for ARMYork Sun
Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM. Signed-off-by: York Sun <yorksun@freescale.com>