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2012-10-29FPGA: Cyclon II: Correctly reset the FPGA before configurationStephan Gatzka
Deassert the CONFIG pin before asserting it again. This assures that the FPGA will be resetted and therefore configuration will be correctly enabled. This is also already done on other FPGA's, e.g. Stratix. Signed-off-by: Stephan Gatzka <stephan.gatzka@hbm.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-03-04Remove execute permissions from source filesThomas Weber
Signed-off-by: Thomas Weber <weber@corscience.de>
2012-01-05fpga: Spartan-3: let print the progress if configuredStefano Babic
CONFIG_SYS_FPGA_PROG_FEEDBACK was already introduced to print the current status of FPGA loading - an undef in the code made this CONFIG_ useless. Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-11-16FPGA: drivers/fpga/ivm_core.c: GCC4.6 fix build warningsStefano Babic
Fix: ivm_core.c: In function 'ispVMLCOUNT': ivm_core.c:2105:16: warning: unused variable 'usByte' Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
2011-10-27GCC4.6: Squash warnings in lattice.cMarek Vasut
lattice.c:319:4: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'const char *' lattice.c:319:4: warning: format '%x' expects type 'unsigned int', but argument 4 has type 'long unsigned int' Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
2011-09-05FPGA: constify Lattice FPGA codeWolfgang Denk
The Lattice code was missed by commit e6a857d "fpga: constify to fix build warning" resulting in such warnings: fpga.c: In function 'fpga_load': fpga.c:238: warning: passing argument 2 of 'lattice_load' discards qualifiers from pointer target type fpga.c: In function 'fpga_dump': fpga.c:278: warning: passing argument 2 of 'lattice_dump' discards qualifiers from pointer target type Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Stefano Babic <sbabic@denx.de>
2011-08-01fpga: constify to fix build warningWolfgang Denk
Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
2011-07-28fpga: support FPP Cyclone configurationMichael Jones
Support FPGAs which use Fast Passive Parallel configuration Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
2011-07-28altera: fix printf typoMichael Jones
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Detlev Zundel <dzu@denx.de>
2010-11-30add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fnsWolfgang Wegner
Currently the hardware was left in an undefined state in case Spartan3 serial load failed. This patch adds Xilinx_abort_fn to give the board a possibility to clean up in this case. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
2010-11-17Switch from archive libraries to partial linkingSebastien Carlier
Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-10-27Coding Style cleanupWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18FPGA: fix support for non-Lattice devicesWolfgang Denk
Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream" added support for Lattice devices, but failed to add #ifdef's that are needed when building for non-Lattice devices, which results in build failures like these: Configuring for GEN860T board... drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info': /home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info' drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump': /home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump' drivers/fpga/libfpga.a(fpga.o): In function `fpga_load': /home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load' make: *** [u-boot] Error 1 Add the missing code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2010-10-13FPGA: add support for downloading Lattice bitstreamStefano Babic
The patch adds support to load a Lattice's bitstream image (called VME file) into a Lattice FPGA. The code containing the state machine delivered as part of Lattice's ispVMtools is integrated. The FPGA is programmed using the JTAG interface. The board maintainer must provide accessors to drive the JTAG signals TCK, TMS, TDI and to get the value of the input signal TDO. Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-24add block write function to spartan3 slave serial loadWolfgang Wegner
Using seperate function calls for each bit-bang of slave serial load can be painfully slow. This patch adds the possibility to supply a block write function that loads the complete block of data in one call (like it can already be done with Altera FPGAs). On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load time from around 15 seconds to around 3 seconds Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
2009-10-03fpga: Remove relocation fixupsPeter Tyser
PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-02-21fpga: Fix Spartan III FPGA bootingMatthias Fuchs
This patch does some minor fixing of the Xilinx Spartan III FPGA boot code: - Fixed call order of post configuration callback and success message printing (result of copy-paste?) - remove obsolete comment - minor coding style cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2009-02-21fpga: Fix Spartan II FPGA bootingMatthias Fuchs
This patch does some minor fixing of the Xilinx Spartan II FPGA boot code: - Fixed call order of post configuration callback and success message printing (result of copy-paste?) - relocate post configuration callback only when it is implemented - remove obsolete comment - minor coding style cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-12-05FPGA: move fpga drivers to drivers/fpgaJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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