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path: root/drivers/gpio
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2019-07-12gpio: stm32_gpio: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: drivers/gpio/stm32_gpio.c: In function 'stm32_offset_to_index': : comparison between signed and unsigned integer expressions [-Wsign-compare] if (idx == offset) ^~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-11gpio: pca953x: Add TI TCA9539 compatible stringMarek Vasut
Add TI TCA9539 compatible string for yet another I2C GPIO expander. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Mario Six <mario.six@gdsys.cc> Cc: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-05-24gpio: dwapb_gpio: fix broken dev->nodeSimon Goldschmidt
commit 1b898ffc040b ("gpio: dwapb_gpio: convert to livetree") introduced a bug in that dev->node of the gpio chip was accidentally set to the of_node of its bank subnode. What it meant to do was assign subdev->node, not dev->node. While this doesn't affect too many use cases, iterating over the gpio chip's properties doesn't work any more after that, so fix this. Fixes: commit 1b898ffc040b ("gpio: dwapb_gpio: convert to livetree") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10gpio: dwapb_gpio: convert to livetreeSimon Goldschmidt
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree functions (inspired from mt7621_gpio.c). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-07gpio: renesas: Add RZ/A1 R7S72100 GPIO driverMarek Vasut
Add GPIO driver for RZ/A1 SoC. The IP is very different from the R-Car Gen2/Gen3 one already present in the tree, hence a custom driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-06Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Various pinctrl / gpio fixes for R-Car
2019-05-04Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mipsTom Rini
- mscc: small fixes, enhance network support for Serval, Luton and Ocelot - mt7620: rename arch to more generic name mtmips - mips: pass initrd addresses via DT as physical addresses
2019-05-04gpio: renesas: Migrate to pinctrl GPIO accessorsMarek Vasut
Switch to generic pin controller API for configuring pins as GPIOs instead of using the ad-hoc call into the R-Car PFC driver. Moreover, add .free() implementation for the GPIO controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick DELAUNAY <patrick.delaunay@st.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org>
2019-05-03mips: rename mach-mt7620 to mach-mtmipsWeijie Gao
Currently mach-mt7620 contains only support for mt7628. To avoid confusion, rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms. MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628 because they do not share the same lowlevel codes. Dependencies of four drivers are changed to SOC_MT7628 as these drivers are only used by MT7628. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-05-01rockchip: use 'arch-rockchip' as header file pathKever Yang
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-04-12gpio: bcm6345: allow this driver on ARCH_BCM63158Philippe Reynes
This IP is also used on some arm SoC, so we allow to use this driver on arch bcm63158. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12gpio: bcm6345: allow this driver on ARCH_BCM6858Philippe Reynes
This IP is also used on some arm SoC, so we allow to use this driver on arch bcm6858. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12gpio: bcm6345: switch to raw I/O functionsPhilippe Reynes
This driver is used on several big endian mips board. So we could use raw I/O function instead of forcing big endian access. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-02-25gpio: altera_pio: fix get_valueJulien Béraud
gpio_get_value should return 0 or 1, not the value of bit & (1 << pin) Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Julien Beraud <julien.beraud@orolia.com>
2019-02-01rockchip: Implement spl_gpio in the GPIO driverSimon Glass
Allow rockchip boards to use GPIOs before driver model is ready. This is really only useful for setting GPIOs to enable the early debug console, if needed on some platforms. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-28gpio: introduce CONFIG_SPL_DM_PCA953XPeng Fan
Introduce CONFIG_SPL_DM_PCA953X for SPL usage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-16mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.cLars Povlsen
With the new mscc_bb_spi.c driver, there is no longer use for the gpio-mscc-bitbang-spi.c driver. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mips: mscc_sgpio: Add the MSCC serial GPIO device (SIO)Lars Povlsen
This add support for the the MSCC serial GPIO driver in MSCC VCoreIII-based SOCs. By using a serial interface, the SIO controller significantly extends the number of available GPIOs with a minimum number of additional pins on the device. The primary purpose of the SIO controller is to connect control signals from SFP modules and to act as an LED controller. This adds the base driver. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-01-09gpio: stm32f7: Fix SPL code sizePatrice Chotard
In order to keep SPL code size below the 32Kb limit, put under CONFIG_SPL_BUILD flag all unused code in SPL. This is needed for stm32f7xx board which are using SPL. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-01-09gpio: stm32f7: Fix gpio bank hole managementPatrice Chotard
In case "gpio-ranges" property is not present in device tree, use default value for gpio_count and gpio_range. This fixes an issue on stm32 F7 and H7 boards where "pinmux status -a" command didn't return any pin status due to the fact that both stm32 F7 and H7 board DT doesn't use the gpio-ranges property. Fixes: dbf928dd2634a6("gpio: stm32f7: Add gpio bank holes management") Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-01-01Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini
imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
2019-01-01imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan
Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
2018-12-19gpio: mscc-bitbang-spi: Add a simple gpio driver for bitbgang spiGregory CLEMENT
The VCore III SoCs such as the Luton but also the Ocelot can remap an SPI flash directly in memory. However, for writing in the flash the communication has to be done by software. Each of the signal used for the SPI are exposed in a single register. In order to be able to use the soft-spi driver, the management of this pin is done through this simple gpio driver. Even if the main purpose of this driver is to be used by soft-spi, it can still be used as a normal gpio driver but with limitation: for example the first pin can't be used as output. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-07gpio: stm32f7: Remove CONFIG_CLK flag.Patrice Chotard
As all STM32 SoCs supports CONFIG_CLK flag, it becomes useless in this driver, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.hPatrice Chotard
To allow access to this define by other driver, move it into gpio.h Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07gpio: stm32f7: Add gpio bank holes managementPatrice Chotard
In some STM32 SoC packages, GPIO bank has not always 16 gpios. Several cases can occur, gpio hole can be located at the beginning, middle or end of the gpio bank or a combination of these 3 configurations. For that, gpio bindings offer the gpio-ranges DT property which described the gpio bank mapping. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-29gpio: dwapb_gpio: fix binding without bank-name propertySimon Goldschmidt
As a preparation for merging the socfpga gen5 devicetree files from Linux, this patch makes the dwapb gpio driver work correctly without the 'bank-name' property on the gpio-controller nodes. This property is not present in the Linux drivers and thus is not present in the Linux devicetrees. It is only used to access pins via bank name. This fallback is necessary since without it, the driver will return an error code which will lead to an error in U-Boot startup. The bank names will still be added to the default board device trees in follow-up patch, but other boards using this driver and not including the bank name should also work with the socfpga.dtsi without adding the bank-name property. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-11-18gpio: Add MT7621 GPIO supportStefan Roese
This patch adds GPIO support for the Mediatek MT7621 SoC, tested on MT7688 (Gardena smart-gateway). The driver is loosly based on the Linux kernel version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned'] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-16gpio: stm32f7: Add ops get_functionPatrice Chotard
This patch adds gpio get_function ops support. This function reports the state of a gpio. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-16gpio: pca953x: Clear the polarity invert register at initYe Li
The pca953x_gpio driver uses default value of polarity inversion register. For some devices like PCA9557 and MAX7310, their polarity inversion register default value is 0xf0. So for high 4 ports, when reading their values, the values are inverted as the actual level. This patch clears the polarity inversion register to 0 at init, so that the port read and write values are aligned. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-11-14gpio: Remove DM_FLAG_PRE_RELOC flag in various driversBin Meng
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only takes effect when devices are statically declared via U_BOOT_DEVICE(). This bug has been fixed recently by commit "dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()", but with the fix, it has a side effect that all existing drivers that declared DM_FLAG_PRE_RELOC flag will be bound before relocation now. This may expose potential boot failure on some boards due to insufficient memory during the pre-relocation stage. To mitigate this potential impact, the following changes are implemented: - Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL) - Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE() - Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-14gpio: pca953x_gpio: fix DT GPIO flags translationAnatolij Gustschin
Commit fb01e07a95 accidentally broke initialisation of GPIO descriptor flags from device tree: currently the active low flag from gpio-specifier is always ignored. Fix it. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Mario Six <mario.six@gdsys.cc>
2018-10-25Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini
Merged imx8 architecture, fix build for imx8 + warnings
2018-10-22gpio: mxc_gpio: add support for i.MX8Peng Fan
Add i.MX8 support, there are 8 GPIO banks. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2018-10-10gpio: da8xx: Push generic defines of gpio.h out of mach-davinciKeerthy
Push generic defines of gpio.h out of mach-davinci to drivers/gpio now that non-davinci architectures are beginning to use this IP. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Fix calimain build] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-10gpio: da8xx: Add k2g compatibleKeerthy
Add k2g compatible so that k3 SoCs can be supported Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-10-03gpio: dwapb_gpio: Change to use devm_kcalloc()Ley Foon Tan
Change to use managed resource function devm_kcalloc(), so it will auto free memory when driver is removed. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15gpio: dwapb_gpio: Change to use dev_read_addr()Ley Foon Tan
This changes the driver to use dev_read_addr() which is safe both for flat trees and live trees. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15gpio: dwapb_gpio: Add reset ctrl to driverLey Foon Tan
Add code to reset all reset signals as in gpio DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15gpio: dwapb_gpio: Enable get_function supportLey Foon Tan
Enabled get_function support for dwapb where the function will return the state of GPIO port. Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-11DM: omap_gpio: Reduce overhead when used with OF_PLATDATAAdam Ford
Platforms with limited resources in SPL may enable OF_PLATDATA, this limits some of the library functions and cannot extract data from the device tree. This patch adds additional wrappers around these functions to only allow them when OF_CONTROL is enabled and OF_PLATDATA is not. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11GPIO: omap_gpio: Fix gpio name names with device treeAdam Ford
The GPIO bank numbers do not appear in the device tree, so this patch makes the gpio name based on the address (ie gpio@49054000_31 vs gpio4_31) adam Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
2018-09-11dm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGHAdam Ford
With DM and device tree support, let's use the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW from the device tree as they are intended. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11DM: GPIO: Fix da8xx GPIO indexing over GPIO 32Adam Ford
The GPIO banks are broken up into two 16-bit registers for each bank set. Unfortunately, the math that determines how to shift blindly shifted by the number of the gpio. This worked for gpio numbers under 32, but higher gpio's are broken. This fixes the gpio index, so the bank is passed and the shift amount within the register is passed now instead of the gpio number. Fixes: 8e51c0f25406("dm: gpio: Add DM compatibility to GPIO driver for Davinci") Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-10gpio: stm32f7: replace ODR update by BSRR writePatrice Chotard
Replace clrsetbits on ODR register (2 operations: one read + one write) by writing on the correct bit (SET or RESET) of the BSRR register (only 1 write operation). Moreover this register if safe for simultaneous access by 2 master on the bus. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-07gpio: xilinx: Add support for using label propertyMichal Simek
Add support for reading label property from DT and set up bank name based on that. If label property is not present full device node name is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Return 0 from xilinx_gpio_set_valueMichal Simek
.set_value functions have no specified return value and gpio_uclass is not working with it too. But this patch is returning 0 to be in sync with others DM gpio drivers. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Not read output values via regsMichal Simek
Reading registers for finding out output value is not working because input value is read instead in case of tristate. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Simplify logic in xilinx_gpio_set_valueMichal Simek
There is no reason to do read/write for if/else separately. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Set value before changing directionMichal Simek
Set a value before changing gpio direction. This will ensure that the old value is not propagated when direction has changed but new value is not written yet. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
generated by cgit (git 2.34.1) at 2024-12-29 16:04:18 +0000