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path: root/drivers/misc/stm32mp_fuse.c
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2019-08-27pmu: stpmic1: change specific NVM api to MISCPatrick Delaunay
Use MISC u-class to export the NVM register (starting at 0xF8 offset) and avoid specific API. - SHADOW have offset < 0. - NVM have register > 0 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27bsec: update after MISC u-class updatePatrick Delaunay
Since the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered"); The misc bsec driver need to be adapted to reflect the number of transferred bytes. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12misc: stm32_fuse: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: warning: no previous prototype for 'fuse_read' [-Wmissing-prototypes] int fuse_read(u32 bank, u32 word, u32 *val) ^~~~~~~~~ CC cmd/sf.o warning: no previous prototype for 'fuse_prog' [-Wmissing-prototypes] int fuse_prog(u32 bank, u32 word, u32 val) ^~~~~~~~~ warning: no previous prototype for 'fuse_sense' [-Wmissing-prototypes] int fuse_sense(u32 bank, u32 word, u32 *val) ^~~~~~~~~~ warning: no previous prototype for 'fuse_override' [-Wmissing-prototypes] int fuse_override(u32 bank, u32 word, u32 val) ^~~~~~~~~~~~~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stpmic1: add NVM update support in fuse commandPatrick Delaunay
Add functions to read/update the non volatile memory of STPMIC1 (8 bytes-register at 0xF8 address) and allow access with fuse command (bank=1, word > 0xF8). For example: STM32MP> fuse read 1 0xf8 8 Reading bank 1: Word 0x000000f8: 000000ee 00000092 000000c0 00000002 Word 0x000000fc: 000000f2 00000080 00000002 00000033 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20misc: Update read() and write() methods to return bytes xferedSimon Glass
At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-26stm32mp1: add FUSE command supportPatrick Delaunay
Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>