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path: root/drivers/mmc
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2020-03-09mmc: am654_sdhci: Implement workaround for card detectFaiz Abbas
The 4 bit MMC controllers have an internal debounce for the SDCD line with a debounce delay of 1 second. Therefore, after clocks to the IP are enabled, software has to wait for this time before it can power on the controller. Add a deferred_probe() callback which polls on sdcd for a maximum of 2 seconds before switching on power to the controller or (in the case of no card) returning a ENOMEDIUM. This pushes the 1 second wait time to when the card is actually needed rather than at every probe() making sure that users who don't insert an SD card in the slot don't have to wait such a long time. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09mmc: am654_sdhci: Update output tap delay writesFaiz Abbas
With the latest RIOT, there is a different otap delay value for each speed mode. Add a new binding with every supported speed mode. Also disable a given speed mode in the host caps if its corresponding otap-del-sel is not present. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09mmc: Merge SD_LEGACY and MMC_LEGACY bus modesFaiz Abbas
MMC_LEGACY & SD_LEGACY are not differentiated timings in the spec and don't have any meaningful differences. Therefore, get rid of all references to SD_LEGACY and use MMC_LEGACY to mean both of them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09sdhci: Add sdhci_deferred_probe() APIFaiz Abbas
Add the sdhci_deferred_probe() function to register as the deferred_probe() callback to the mmc core. It will in turn call the deferred_probe() callback of the platform drivers as declared in the sdhci_ops. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09mmc: Add a deferred_probe() APIFaiz Abbas
Add a deferred_probe() API for platforms that want to do some configurations just before starting to enumerate the device. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCsArthur Li
Initial DesignWare based DM support for Cortina Access CAxxxx SoCs. Signed-off-by: Arthur Li <arthur.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-20mmc: sdhci: fix missing cache invalidation after reading by DMAMasahiro Yamada
This driver currently performs cache operation before the DMA start, but does nothing after the DMA completion. When reading data by DMA, the cache invalidation is needed also after finishing the DMA transfer. Otherwise, the CPU might read data from the cache instead of from the main memory when speculative memory read or memory prefetch occurs. Instead of calling the cache operation directly, this commit adds dma_unmap_single(), which performs cache invalidation internally, but drivers do not need which operation is being run. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-20mmc: sdhci: use dma_map_single() instead of flush_cache() before DMAMasahiro Yamada
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the DMA direction. Actually, cache invalidation is enough when reading data from the device. This is correctly handled by dma_map_single(), which mimics the DMA-API in Linux kernel. Drivers can be agnostic which cache operation occurs behind the scene. This commit also sanitizes the difference between the virtual address and the dma address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-20mmc: sdhci: remove unneeded castsMasahiro Yamada
host->mmc is already (struct mmc *). memalign() returns an opaque pointer, so there is no need for casting. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-20mmc: sdhci: use lower_32_bit2() and upper_32_bits() for setting adma_addrMasahiro Yamada
Use {lower,upper}_32_bits() instead of the combination of cast and shift. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-20mmc: sdhci: reduce code duplication for aligned bufferMasahiro Yamada
The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER). Unify the code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-20mmc: sdhci: put the aligned buffer pointer to struct sdhci_hostMasahiro Yamada
Using the global variable does not look nice. Add a new field sthci::align_buffer to point to the bounce buffer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-19dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>Masahiro Yamada
The implementation of dma_map_single() and dma_unmap_single() is exactly the same for all the architectures that support them. Factor them out to <linux/dma-mapping.h>, and make all drivers to include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>. If we need to differentiate them for some architectures, we can move the generic definitions to <asm-generic/dma-mapping.h>. Add some comments to the helpers. The concept is quite similar to the DMA-API of Linux kernel. Drivers are agnostic about what is going on behind the scene. Just call dma_map_single() before the DMA, and dma_unmap_single() after it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19dma-mapping: fix the prototype of dma_unmap_single()Masahiro Yamada
dma_unmap_single() takes the dma address, not virtual address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19mmc: fsl_esdhc: actually enable cache snooping on mpc830xRasmus Villemoes
The reference manuals for MPC8308 and MPC8309 both say that the esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the System configuration registers. Unfortunately, that doesn't mean that the registers are just mirrors of each other - any write to esdhcctl is simply ignored. So to actually enable cache snooping, we unfortunately have to add a little ifdeffery. There is, naturally, no description of the bit fields of esdhcctl in the MPC8309 manual, but comparing the description of esdhcctl from the LS1021A reference manual to the description of the sdhccr in MPC8309, one also finds that the fields are bit-reversed, so the bit to set is 0x02000000 rather than 0x00000040 - this is also what board_mmc_init() uses in the two gdsys/mpc8308/ boards. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-02-17mmc: remove unneeded forward declarationsMasahiro Yamada
These functions are defined before the callers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-02-17mmc: check the return value of mmc_select_mode_and_width()Masahiro Yamada
Since commit 01298da31d92 ("mmc: Change mode when switching to a boot partition"), errors in mmc_select_mode_and_width() are ignored. The return value should be checked. Fixes: 01298da31d92 ("mmc: Change mode when switching to a boot partition") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-17mmc: sdhci-cadence: send tune request twice to work around errataMasahiro Yamada
Cadence sent out an errata report to their customers of this IP. This errata is not so severe, but the tune request should be sent twice to avoid the potential issue. Quote from the report: Problem Summary --------------- The IP6116 SD/eMMC PHY design has a timing issue on receive data path. This issue may lead to an incorrect values of read/write pointers of the synchronization FIFO. Such a situation can happen at the SDR104 and HS200 tuning procedure when the PHY is requested to change a phase of sampling clock when moving to the next tuning iteration. Workarounds ----------- The following are valid workarounds to resolve the issue: 1. In eMMC mode, software sends tune request twice instead of once at each iteration. This means that the clock phase is not changed on the second request so there is no potential for clock instability. 2. In SD mode, software must not use the hardware tuning and instead perform an almost identical procedure to eMMC, using the HRS34 Tune Force register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-17mmc: fix the build error when MMC_WRITE is disabledJaehoon Chung
erase_grp_size is used, when MMC_WRITE is enabled. - error: ‘struct mmc’ has no member named ‘erase_grp_size’ Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-02-17drivers: mmc: rpmb: Use R1 responseBharat Kumar Reddy Gooty
If the host has Broken R1B, use only R1 response type. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-01-28Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-samsungTom Rini
- Various exynos fixes
2020-01-25mmc: tmio-common: Drop custom dma mapping functionsVignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific common implementation Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-23mmc: s5p_sdhci: Read generic MMC properties from DTMarek Szyprowski
Read generic MMC properties from device-tree. This allows to specify for example cd-inverted property and let MMC core to properly handle such case. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2020-01-20Merge tag '2020-01-20-ti-2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti K3 J721E: * DMA support. * MMC and ADMA support. * EEPROM support. * J721e High Security EVM support. * USB DT nodes K3 AM654: * Fixed boot due to pmic probe error. * USB support and DT nodes. * ADMA support DRA7xx/AM57xx: * BBAI board support * Clean up of net platform code under board/ti AM33/AM43/Davinci: * Reduce SPL size for omap3 boards. * SPL DT support for da850-lcdk * PLL divider fix for AM335x
2020-01-20mmc: am654_sdhci: Add Support for configuring PHY in J721eFaiz Abbas
Add Support for writing to PHY registers for J721e. There are number of differences between the J721e 8 bit PHY, J721e 4 bit PHY and AM654 PHY. Create a driver_data structure with an ops and flags field and use the flags field to indicate these differences. The differences are as follows: 1. The J721e 4 bit instance PHY does not have a DLL. Introduce a DLL_PRESENT flag to make sure that DLL related registers are accessed only where they are present. Also add a separate set_ios_post() callback. 2. The J721e 8 bit instance is not muxed with anything else inside the SoC and hence the IOMUX_ENABLE filed does not exist. Add a flag which is used to indicate the presence of this field. 3. The register field used to select DLL frequency is 3 bit wide in J721e as compared to 2 bits in AM65x. Add another flag that distinguishes these fields. 4. The strobe select field is 8 bit wide as compared to 4 bit wide for AM65x. Add yet another flag to indicate this difference. Strobe select is used only for HS400 speed mode, support for which has not been added in AM65x. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20mmc: am654_sdhci: Get Xin clock by nameFaiz Abbas
Get clk_xin by name instead of by index to avoid having to put clocks in the same order in all devices. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-16Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
2020-01-16mmc: add mmc and sd support for MT7622Sam Shih
This patch add mmc and sd support for Mediatek MT7622 SoCs Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16mmc: mtk-sd: fix hang when data read quicklymingming lee
For CMD21 tuning data, the 128/64 bytes data may coming in very short time, before msdc_start_data(), the read data has already come, in this case, clear MSDC_INT will cause the interrupt disappear and lead to the thread hang. the solution is just clear all interrupts before command was sent. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCsmingming lee
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs. MT8512/MT8110 SoCs puts the tune register at top layer, so need add new code to support it. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16mmc: config help typo fixJoel Johnson
Fix typo in description of MMC_QUIRKS config option. Signed-off-by: Joel Johnson <mrjoel@lixil.net>
2020-01-16mmc: add additional quirk for APP_CMD retryJoel Johnson
It was observed (on ClearFog Base) that sending MMC APP_CMD returned an error on the first attempt. The issue appears to be timing related since even inserting a puts() short debug entry before the execution added sufficient delay to receive success on first attempt. Follow the existing quirks pattern to retry if initial issuance failed so as to not introduce any delay unless needed. Signed-off-by: Joel Johnson <mrjoel@lixil.net>
2020-01-16Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usageYangbo Lu
The eSDHC reference clocks should be provided by speed.c in arch/. And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to select which clock to use. Because we can make the driver to select the periperhal clock which is better (provides higher frequency) automatically if its value is provided by speed.c. This patch is to drop this option and make driver to select clock automatically. Also fix peripheral clock calculation issue in fsl_lsch2_speed.c/fsl_lsch3_speed.c. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16mmc: fsl_esdhc: drop useless fdt fixupYangbo Lu
The fdt fixup for properties "peripheral-frequency" and "adapter-type" was once for a Freescale SDK release. The properties haven't been existed in linux mainline. Drop these useless code. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock codeYangbo Lu
Drop QorIQ eSDHC specific peripheral clock code. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-14mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhcGiulio Benetti
Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms with CONFIG_DM_MMC=y. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statementGiulio Benetti
Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK instead. So building could result in failure due to missing mxc_get_clock(). Make if(CONFIG_IS_ENABLED(CLK)) an #if statement. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14mmc: fsl_esdhc_imx: Handle the "broken-cd" propertyFabio Estevam
When no GPIO is used to read the card detect status the following error is seen: MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... MMC: no card present *** Warning - No block device, using default environment Fix it by handling the "broken-cd" property in the same way that drivers/mmc/sdhci.c does, which considers that the SD card is present when the "broken-cd" property is passed. Tested on a imx6ul-evk board. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-07arm: socfpga: Convert clock manager from struct to definesLey Foon Tan
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get clock manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert system manager from struct to definesLey Foon Tan
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get system manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-06Merge branch 'next'Tom Rini
Bring in the following merges: commit 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 Merge: 87f69f467a83 63618e71e89b Author: Tom Rini <trini@konsulko.com> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit 87f69f467a8335b171c71bf217d2625d515acd7c Merge: c0912f9bbfb2 4466b9970319 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commit c0912f9bbfb26dd03d189953678691b799d35b6e Merge: 533c9f5714bd a1d6dc3f8407 Author: Tom Rini <trini@konsulko.com> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit 533c9f5714bdba79dc6f2629284d4c1a08a611d1 Merge: 553cb0688782 033e18b47bd0 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit 553cb06887825314e74a9bdac337467c77d1db88 Merge: f39abbbc531e b4f98b3b16ec Author: Tom Rini <trini@konsulko.com> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
2020-01-04Revert "mmc: davinci: drop struct davinci_mmc_plat"Tom Rini
Adam Ford reports that this change breaks booting on da850-evm and Bartosz Golaszewski agrees that with the impending release we should revert the change for now. With that noted: This reverts commit 21a4d80a710c79053ac1deaa65ff9b69e6c031d4. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-15dm: gpio: Allow control of GPIO uclass in SPLSimon Glass
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass is included in SPL/TPL without any control for boards. Some boards may want to disable this to reduce code size where GPIOs are not needed in SPL or TPL. Add a new Kconfig option to permit this. Default it to 'y' so that existing boards work correctly. Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to preserve the current behaviour. Also update the 74x164 GPIO driver since it cannot build with SPL. This allows us to remove the hacks in config_uncmd_spl.h and Makefile.uncmd_spl (eventually those files should be removed). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-03mmc: mtk-sd: Adjust the mmc tuning flowmingming lee
1.Support cmd response and data tuning together. 2.Support hs400 cmd responese tuning. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03mmc: davinci: fix mmc boot in SPLBartosz Golaszewski
The MMC boot is currently broken on omapl138-lcdk after enabling the driver model in SPL. The main problem is the driver's bind callback not being called after probe in SPL (even with the DM_FLAG_PRE_RELOC flag specified). While a proper fix is still being worked on, this hacky changeset at least fixes the MMC boot on this platform by calling mmc_bind() manually from probe(). Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03mmc: davinci: drop struct davinci_mmc_platBartosz Golaszewski
struct mmc_config & struct mmc don't need to be exported over platform data, but can instead be private in the driver. Remove struct davinci_mmc_plat. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03mmc: davinci: drop support for ti,dm6441-mmcBartosz Golaszewski
The DM family of DaVinci SoCs is no longer supported. Drop the irrelevant code from the driver. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
generated by cgit (git 2.34.1) at 2024-12-28 23:48:50 +0000