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enable.
Before the patch, it looks like:
|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06)
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|CPU: AT91SAM9G35
|Crystal frequency: 12 MHz
|CPU clock : 400 MHz
|Master clock : 133.333 MHz
|DRAM: 128 MiB
|WARNING: Caches not enabled
> |NAND: Initialize PMECC params, cap: 2, sector: 512
> |256 MiB
|MMC: mci: 0
|In: serial
|Out: serial
|Err: serial
|Net: macb0
|Hit any key to stop autoboot: 0
After the patch:
|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11)
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|CPU: AT91SAM9G35
|Crystal frequency: 12 MHz
|CPU clock : 400 MHz
|Master clock : 133.333 MHz
|DRAM: 128 MiB
|WARNING: Caches not enabled
> |NAND: 256 MiB
| ... ...
|Hit any key to stop autoboot: 0
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.
To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.
This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Change my old email address which is no longer valid.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
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This patch sync with David's patch on Linux for handling nand_scan_ident.
commit 5e81e88a4c140586d9212999cea683bcd66a15c6
Author: David Woodhouse <David.Woodhouse@intel.com>
Date: Fri Feb 26 18:32:56 2010 +0000
mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
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This is a patch to use the hardware ECC controller of
the AT91SAM9260 for the AT91 nand. Taken from the kernel 2.6.33.
Signed-off-by: Nikolay Petukhov <Nikolay.Petukhov@gmail.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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