summaryrefslogtreecommitdiff
path: root/drivers/mtd/spi
AgeCommit message (Collapse)Author
2014-12-18sf: sf_params: Add S25FL164K flash identifier infoAdnan Ali
Add the necessary flash entry for the Spansion S25FL164K flash. Tested on Marvell 88F6218 based design. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-18sf: sf_params: Add S25FL116K flash supportAdnan Ali
Added S25FL116K flash and tested on Marvell 88F6281 based system. Signed-off-by: Adnan Ali <adnan.ali@codethink.co.uk> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-18mtd/spi: Add support for SST25WF040BShengzhou Liu
Add support for SST25WF040B-40I-SN flash. Tested on T1024QDS board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-18mtd: sf: Zap ramtron driverJagannadha Sutradharudu Teki
Removed ramtron driver since the EMK boards are no longer been active, and these are the only boards used this flash driver. Commit details for EMK zap: "ppc/arm: zap EMK boards" (sha1: d58a9451e7339ed4cf2b2627e534611f427fb791) Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
2014-12-13sf: Enable byte program supportJagannadha Sutradharudu Teki
Enabled byte program support for sst flashes in sf. Few controllers will only support BP, so this patch gives a tx transfer flag to set the BP so-that sf will operate on byte program transfer. A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI controller to use byte program op for SST flash. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2014-12-13spi: sf: Support byte program for sst spi flashBin Meng
Currently if SST flash advertises SST_WP flag in the params table the word program command (ADh) with auto address increment will be used for the flash write op. However some SPI controllers do not support the word program command (like the Intel ICH 7), the byte programm command (02h) has to be used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-13spi: Fix flag collision for SST_WPSimon Glass
At present SECT_4K is the same as SST_WP so we cannot tell these apart. Fix this so that the table in sf_params.c can be used correctly. Reported-by: Jens Rottmann <Jens.Rottmann@adlinktech.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-13sf: Fix look for the fastest read commandJagannadha Sutradharudu Teki
Few of the spi controllers are only supports array slow read which is quite different behaviour compared to others. So this fix on sf will correctly handle the slow read supported controllers. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2014-11-24Merge git://git.denx.de/u-boot-dmTom Rini
Conflicts: drivers/serial/serial-uclass.c Signed-off-by: Tom Rini <trini@ti.com>
2014-11-23linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada
U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
2014-11-22dm: spi: Use device_bind_driver() instead of our own functionSimon Glass
The SPI function does the same thing, so we may as well just use the new generic function. The 'cs' parameter was not actually used, so can be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
2014-11-22dm: spi: Correct handling of SPI chip selects in sandboxSimon Glass
This code was not updated when the chip select handling was adjusted. Fix it to call the correct function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
2014-10-22dm: sf: sandbox: Convert SPI flash driver to driver modelSimon Glass
Convert sandbox's spi flash emulation driver to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22dm: Convert spi_flash_probe() and 'sf probe' to use driver modelSimon Glass
We want the SPI flash probing feature to operate as a standard driver. Add a driver for the basic probing feature used by most boards. This will be activated by device_probe() as with any other driver. The 'sf probe' command currently keeps track of the SPI slave that it last used. This doesn't work with driver model, since some other driver or system may have probed the device and have access to it too. On the other hand, if we try to probe a device twice the second probe is a nop with driver model. Fix this by searching for the matching device, removing it, and then probing it again. This should work as expected regardless of other device activity. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22dm: sf: Add a uclass for SPI flashSimon Glass
Add a driver model uclass for SPI flash which supports the common operations (read, write, erase). Since we must keep support for the non-dm interface, some modification of the spi_flash header is required. CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22spi: Use error return value in sf_opsSimon Glass
Adjust spi_flash_probe_slave() to return an error value instead of a pointer so we get the correct error return. Have the caller allocate memory for spi_flash to simplify error handling, and also so that driver model can use its existing allocated memory. Add a spi.h include in the sf_params file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22sf: Tidy up public and private header filesSimon Glass
Since spi_flash.h is supposed to be the public API for SPI flash, move private things to sf_internal.h. Also tidy up a few comment nits. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22dm: Add spi.h header to a few filesSimon Glass
Some files are using SPI functions but not explitly including the SPI header file. Fix this, since driver model needs it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-09-26sandbox: Convert SPI flash emulation to use sf_paramsSimon Glass
At present sandbox has its own table of supported SPI flash chips. Now that the SPI flash system is fully consolidated and has its own list, sandbox should use that. This enables us to expand the number of chips that sandbox supports. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24sf: Add M25PX64 SPI NOR flash IDStefan Roese
Add ID for this Numonix / STMicro chip. Tested on Marvell DB-78460-BP board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*Nikita Kiryanov
Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in SPL. These #defines do not allow the user to select SPI mode for the SPI flash (there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in spi_spl_load.c), and duplicate information already provided by CONFIG_SF_DEFAULT_* #defines. Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Hannes Petermaier <hannes.petermaier@br-automation.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24mtd: spi: add support for M25PE16 and M25PX16Nikita Kiryanov
Add support for M25PE16 and M25PX16 Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-23sf: Add an empty entry to the parameter listSimon Glass
The list is supposed to be terminated with a NULL name, but is not. If a board probes a chip which does not appear in the table, U-Boot will crash (at least on sandbox). Signed-off-by: Simon Glass <sjg@chromium.org>
2014-08-11Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic
Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-08-06sf: sf_ops: Stop leaking memoryMarek Vasut
It's usually a common pattern to free() the memory that we allocated. Implement this here to stop leaking memory. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-07-23spi: add config option to enable the WP pin function on st micron flashesHeiko Schocher
enable the W#/Vpp signal to disable writing to the status register on ST MICRON flashes like the N25Q128 thorugh the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-06-08sf: probe: Fix quad bit set pathPoddar, Sourav
Currently, flash quad bit is set in "spi_flash_validate_params" and later at the end in the same api, we write 0 to status register for few flashes, thereby overriding the quad bit set. This fix moves the quad bit setting outside this api in "spi_flash_probe_slave" Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08sf: params: Added support for Spansion S25FL512S_512KSiva Durga Prasad Paladugu
Added support for Spansion chip "S25FL512S_512K". Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-05-09Merge branch 'u-boot/master'Albert ARIBAUD
Conflicts: drivers/net/Makefile (trivial merge)
2014-04-22driver: Add support of image load for MMC & SPI in SPLPrabhakar Kushwaha
Add support of loading image, binary for MMC and SPI during SPL boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22driver/mtd/spi:Read 8KB data chunk during u-boot load in SPLPrabhakar Kushwaha
SPI driver perform its operation(read/write) on 64KB buffer chunk for data greater than 64KB. This buffer chunk is allocated from system heap. During SPL boot, 768KB of data is read from SPI flash. Here, heap size may not be sufficient enough to full-fill 64KB buffer requirement of SPI driver. So break down u-boot read operation at 8KB of chunk. Also, fix a warning i.e. "unused variable buf" during CONFIG_FSL_CORENET Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-17SPL:SPI: Add Falcon Mode supportTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2014-03-17mtd: spi: Fix page size for S25FL032P,S25FL064PMarek Vasut
The commit 6af8dc3ebccb3b1e4b2e479315e49545e7f53150 broke support for S25FL032P and S25FL064P by carelessly removing the code handling special page size for these two SPI NOR flashes and unifying the code under the assumption that Extended JEDEC ID of 0x4d00 always implies 512b page size. Add special case handling for these two SPI NOR flashes. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17sf: ops: Squash the malloc+memset comboJagannadha Sutradharudu Teki
Squash the malloc()+memset() combo in favor of calloc(). Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Marek Vasut <marex@denx.de>
2014-03-17sf: Squash the malloc+memset comboMarek Vasut
Squash the malloc()+memset() combo in favor of calloc(). Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17sf: Add S25FL128S_256K IDsMarek Vasut
Add IDs for this new chip. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17sf: Fix entries for S25FL256S_256K and S25FL512S_256KMarek Vasut
Both of these chips have 256kB big sectors, thus the _256K suffix, compared to their _64K counterparts, which have 64kB sectors. Also, they have four times less sectors than their _64K counterparts. Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12sf: params: Removed flag SECT_4K for Micron N25Q128Siva Durga Prasad Paladugu
Remove the flag SECT_4K for device N25Q128 as the 4K-byte sub sector erase granularity is available only for top/bottom 8 sectors in some of the N25Q128 chips. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12sf: Add CONFIG_SF_DUAL_FLASHJagannadha Sutradharudu Teki
This config will use for defining greater than single flash support. currently - DUAL_STACKED and DUAL_PARALLEL. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12sf: Add dual memories support - DUAL_PARALLELJagannadha Sutradharudu Teki
This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12sf: Add dual memories support - DUAL_STACKEDJagannadha Sutradharudu Teki
This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12sf: ops: Unify read_ops bank configurationJagannadha Sutradharudu Teki
Unified the bar code from read_ops into a spi_flash_bar() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12sf: Code cleanupsJagannadha Sutradharudu Teki
- comment typo's - func args have a proper names Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: Divide flash register ops from QEB codeJagannadha Sutradharudu Teki
QEB code comprises of couple of flash register read/write operations, this patch moved flash register operations on to sf_op Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: probe: Enable macronix quad read/write cmds supportJagannadha Sutradharudu Teki
Added macronix flash quad read/write commands support and it's up to the respective controller driver usecase to configure the respective commands by defining SPI RX/TX operation modes from include/spi.h on the driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: Add macronix set QEB supportJagannadha Sutradharudu Teki
This patch adds set QEB support for macronix flash devices which are trying to program/read quad operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: Discover read dummy_byteJagannadha Sutradharudu Teki
Discovered the read dummy_byte based on the configured read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: Add QUAD_IO_FAST read supportJagannadha Sutradharudu Teki
This patch adds support QUAD_IO_FAST read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: Separate the flash params tableJagannadha Sutradharudu Teki
Moved the flash params table from sf_probe.c and placed on to sf_params.c, hence flash params file will alter based on new addons. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11sf: probe: Enable RD_FULL and WR_QPPJagannadha Sutradharudu Teki
This patch enabled RD_FULL and WR_QPP for supported flashes in micron, winbond and spansion. Remaining parts will be add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>