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path: root/drivers/mtd
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2012-09-17nand: Make NAND lock status compatible with MicronJoe Hershberger
Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not the same as others. Instead of bit 1 being lock, it is #lock_tight. To make the driver support either format, ignore bit 1 and use only bit 0 and bit 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: consolidate duplicated constantsJoe Hershberger
NAND_CMD_ constants for lock/unlock should be in the header Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: Change ulong to loff_t and size_tJoe Hershberger
Missed in previous cleanup. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: Add support for unlock.invertJoe Hershberger
NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mtd: support ONFI multi lun NANDMatthieu CASTET
With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> [scottwood@freescale.com: picked from Linux into U-Boot] Reported-by: Rafael Beims <rafael.beims@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17spiflash: at25: using common spi flash operationBo Shen
Using common spi flash operation function to replace private operation funtion Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-17spi: add atmel at25df321 serial flash supportBo Shen
Add atmel at25df321 serial flash support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-13atmel_nand: fix the U-Boot output information about nand flash with PMECC ↵Wu, Josh
enable. Before the patch, it looks like: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: Initialize PMECC params, cap: 2, sector: 512 > |256 MiB |MMC: mci: 0 |In: serial |Out: serial |Err: serial |Net: macb0 |Hit any key to stop autoboot: 0 After the patch: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: 256 MiB | ... ... |Hit any key to stop autoboot: 0 Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-10NAND: MXS: include common.h first so cache.h is included in correct orderTom Warren
With Simon Glass's include/nand.h alignment changes, some mxs builds were generating errors. Fix is to ensure asm/cache.h is included before linux/mtd/nand.h. Moving common.h to top of include list does that. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2012-09-07tegra: nand: Add Tegra NAND driverJim Lin
A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07nand: Try to align the default buffersSimon Glass
The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-03cfi: Make the flash erase and write operations abortableJoe Hershberger
Check for ctrlc() in operations that take time and loop over the flash addresses. In netconsole, tstc() is expensive. Only check once in a while to not slow down the operation significantly. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-03cfi: Check for blank before eraseJoe Hershberger
Added an optional check in the CFI driver to evaluate if the sector is already blank before issuing an erase command. Improves erase time by over a factor of 10 if already blank. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-01at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh
The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: atmel_nand: remove unused variables.Wu, Josh
Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh
atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01mxs: Convert sys_proto.h prefixes to 'mxs'Otavio Salvador
The sys_proto.h functions (except the boot modes) are compatible with i.MX233 and i.MX28 so we use 'mxs' prefix for its methods. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01arm: omap: Fix switching back to nandecc sw.Jeroen Hofstee
Orjan Friberg wrote at [1]: "For the beagleboard, ecc.size is not explicitly set when doing 'nandecc sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's set to 256 bytes. When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly the format has changed." No patch has been submitted and the issue was still present. This patch adds the mentioned solution. Tested on a tam3517 board. [1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html cc: Orjan Friberg <of@flatfrog.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-09-01mxs: prefix register structs with 'mxs' prefixOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk
* 'sf' of git://git.denx.de/u-boot-blackfin: sf: spansion: Add support for S25FL256S sf: winbond: fix page_size sf: stmicro: add support for N25Q128A sf: stmicro: add support N25Q128 parts sf: stmicro: support JEDEC standard two-byte signature sf: winbond: add W25Q32 cmd_spi: remove superfluous semicolon Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-08-14sf: spansion: Add support for S25FL256SMichal Simek
Add support for Spansion S25FL256S SPI flash. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-14sf: winbond: fix page_sizeStephen Warren
Commit a4ed3b6 "sf: inline data constants" modified winbond.c's page_size from 256 to 4096. This prevents either/both of "sf write" writing the correct data, or "sf read" from reading the correct data back. This allows U-Boot running on Compulab Tegra to upgrade itself. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-13mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashsHolger Brunck
commit 54652991 Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads to problems for smaller versions of this chip e.g. the 32Mbit version with deviceid 0x16 on mgcoge. So move the code for this work around to an own function and check previously manufacturer id and device id to not break other flashes which don't need this work around. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Heiko Schocher <hs@denx.de> cc: Stefan Roese <sr@denx.de> cc: Philippe De Muyter <phdm@macqel.be> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-13cfi_flash: add support for Spansion flash PPB sector protectionAnatolij Gustschin
Erasing flash sectors protected with persistent protection bit (PPB) mechanism on Spansion flash chips doesn't work. Add sector protection status checking and sector lock and unlock commands to fix this. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-10sf: stmicro: add support for N25Q128AMichal Simek
Add support for Numonyx N25Q128A SPI flash. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09sf: stmicro: add support N25Q128 partsStephan Linz
Adds support for Numonyx's N25Q128 SPI flash. These devices are used on (among others) Avnet Spartan-6 LX9 micro-evaluation boards. Tested with "sf" commands and CONFIG_ENV_IS_IN_SPI_FLASH. Signed-off-by: Stephan Linz <linz@li-pro.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09sf: stmicro: support JEDEC standard two-byte signatureStephan Linz
There are more than the M25Pxx serial flashs that can be used with the stmicro driver, for example: the M25PXxx or N25Qxx serie. All these chips have burned in the original stmicro manufacture id 0x20 together with a standard two-byte signature. In preperation to support all these chips the stmicro driver have to decode the full two-byte signature. Signed-off-by: Stephan Linz <linz@li-pro.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09sf: winbond: add W25Q32Rajeshwari Shinde
SMDK EVT1 has a different Winbond part, added its part details to the SPI flash table. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-08sf: stmicro: add geometrical info for N25Q256 from MicronJérôme Carretero
Note: because 4-byte addressing is not supported yet, at the moment only the first 16MiB of the device are available. Signed-off-by: Jérôme Carretero <cJ@zougloub.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04sf: unify status register writing (and thus block unlocking)Mike Frysinger
The only two drivers to write the status register do it in the same way, so unify the implementations. This also makes the block unlock logic the same. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04sf: sst: inline duplicate write enable helper funcsMike Frysinger
The local sst enable/disable write funcs don't really add anything over the common API, so just inline the common calls directly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04sf: eon: drop duplicate idMike Frysinger
Looks like Shaohui Xie's patch got merged twice. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04sf: unify erase commandsMike Frysinger
Analysis of the flash drivers shows that they all use 0x20 if the erase size is 4KiB, or 0xd8 if it's larger. So with this info in hand, we can unify all the erase functionality in one place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04sf: inline data constantsMike Frysinger
I imagine much of these constants are due to copy & pasting previous drivers rather than an actual reflection of the hardware layout. At any rate, inline the info that we don't care about externally as it shrinks things nicely. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-20sf: spansion: inline useless id definesMike Frysinger
No need for dedicated defines when these really only get used once. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-20sf: drop unused/duplicate command definesMike Frysinger
In an effort to unify the spi flash drivers further, drop all the unused and/or duplicate command defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-07MTD: SPEAr SMI: Add write support for length < 4 bytesStefan Roese
Needed for redundant environment for example. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
2012-07-07st_smi: Fixed page size for Winbond W25Q128FV flashArmando Visconti
Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Change timeout loop implementationAmit Virdi
There are two problems in the current timeout loop implementation: 1. In case initial test failing, there will always be a delay of 1 ms 2. The delay duration is not tunable The new implementation addresses both these limitations. Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Fix bug in flash_print_info()Armando Visconti
If the flash size was smaller than 1MB then flash_print_info() was erroneously reporting 0 MB. Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Change the flash probing methodArmando Visconti
THis patch introduces a new methodology for flash probing in which flash_devices[] table, looked-up thru the dev_id, is used to locate the flash geometry and information. Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Removed no needed dependency on ST_M25Pxx_IDArmando Visconti
Since the smi erase code is very generic and works for any kind of flash, there is no need to test for ST_M25Pxx_ID flash types like m25p40 flashes). Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Fix smi read statusVipin Kumar
smi_read_sr fails sometimes because of TFF not getting set within assumed time. This condition may arise because of, for example, smi memory being in a erase mode. This fix is to enable reading the status register until timeout. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Move status register read before modifying ctrl registerShiraz Hashim
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Read status until timeout happensVipin KUMAR
SMI driver read status fails because the control register could not be overwritten. Instead, the read status should be tried until timeout. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Enhance the error handlingAmit Virdi
This commit does the following: - Reports error if SNOR flash is not found on the board - Changes smi_read_sr to return error using which a retry mechanism is implemented for reading flash status Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Return error in case TFF is not setAmit Virdi
Curently the code makes wrong assumption that the Transfer finished flag shall be set within the stipulated time. However, there may occur a scenario in which the TFF flag is not set. Return error in that case. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Add support for SPEAr SMI driverVipin KUMAR
SMI is the serial memory interface controller provided by ST. Earlier, a driver exists in the u-boot source code for the SMI IP. However, it was specific to spear platforms. This commit converts the same driver to a more generic driver. As a result, the driver files are renamed to st_smi.c and st_smi.h and moved into drivers/mtd folder for reusability by other platforms using smi controller peripheral. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07mtd/NAND: Remove obsolete SPEAr specific NAND driversVipin KUMAR
Since, SPEAr platform uses generic FSMC driver now, so spear specific files drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are removed Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07mtd/NAND: Add FSMC driver supportVipin KUMAR
Flexible static memory controller is a peripheral provided by ST, which controls the access to NAND chips along with many other memory device chips eg NOR, SRAM. This patch adds the driver support for FSMC controller interfacing with NAND memory. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
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