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2020-02-19dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>Masahiro Yamada
The implementation of dma_map_single() and dma_unmap_single() is exactly the same for all the architectures that support them. Factor them out to <linux/dma-mapping.h>, and make all drivers to include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>. If we need to differentiate them for some architectures, we can move the generic definitions to <asm-generic/dma-mapping.h>. Add some comments to the helpers. The concept is quite similar to the DMA-API of Linux kernel. Drivers are agnostic about what is going on behind the scene. Just call dma_map_single() before the DMA, and dma_unmap_single() after it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19dma-mapping: fix the prototype of dma_unmap_single()Masahiro Yamada
dma_unmap_single() takes the dma address, not virtual address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05mtd: Rename free() to rfree()Simon Glass
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-01mtd: rawnand: denali_dt: use UCLASS_MTD instead of UCLASS_MISCMasahiro Yamada
UCLASS_MTD is a better fit for NAND drivers. Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile drivers/mtd/mtd-uclass.c Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig of this platform enables NAND_DENALI_DT. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-02-01mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES based on DT compatibleMasahiro Yamada
Currently, the denali NAND driver in U-Boot configures the SPARE_AREA_SKIP_BYTES based on the CONFIG option. Recently, Linux kernel merged a patch that associates the proper value for this register with the DT compatible string. Do likewise in U-Boot too. The denali_spl.c still uses CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01mtd: rawnand: denali_dt: insert udelay() after reset deassertMasahiro Yamada
When the reset signal is de-asserted, the HW-controlled bootstrap starts running unless it is disabled in the SoC integration. It issues some commands to detect a NAND chip, and sets up registers automatically. Until this process finishes, software should avoid any register access. Without this delay function, some of UniPhier boards hangs up while executing nand_scan_ident(). (denali_read_byte() is blocked) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01mtd: rawnand: denali: Do not reset the block before booting the kernelMarek Vasut
The Denali NAND driver in mainline Linux currently cannot deassert the reset. The upcoming Linux 5.6 will support the reset controlling, and also set up SPARE_AREA_SKIP_BYTES correctly. So, the Denali driver in the future kernel will work without relying on any bootloader or firmware. However, we still need to take care of stable kernel versions for a while. U-boot should not assert the reset of this controller. Fixes: ed784ac3822b ("mtd: rawnand: denali: add reset handling") Signed-off-by: Marek Vasut <marex@denx.de> [yamada.masahiro: reword the commit description] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01mtd: rawnand: denali_dt: make the core clock optionalMasahiro Yamada
The "nand_x" and "ecc" clocks are currently optional. Make the core clock optional in the same way. This will allow platforms with no clock driver support to use this driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Marek Vasut <marex@denx.de> # On SoCFPGA Arria V
2020-02-01mtd: rawnand: denali-spl: Add missing hardware init on SoCFPGAMarek Vasut
On Altera SoCFPGA, upon either cold-boot or power-on reset, the Denali NAND IP is initialized by the BootROM ; upon warm-reset, the Denali NAND IP is NOT initialized by BootROM. In fact, upon warm-reset, the SoCFPGA BootROM checks whether the SPL image in on-chip RAM is valid and if so, completely skips re-loading the SPL from the boot media. This does sometimes lead to problems where the software left the boot media in inconsistent state before warm-reset, and because the BootROM does not reset the boot media, the boot media is left in this inconsistent state, often until another component attempts to access the boot media and fails with an difficult to debug failure. To mitigate this problem, the SPL on Altera SoCFPGA always resets all the IPs on the SoC early on boot. This results in a couple of register values, pre-programmed by the BootROM, to be lost during this reset. To restore correct operation of the IP on SoCFPGA, these values must be programmed back into the controller by the driver. Note that on other SoCs which do not use the HW-controlled bootstrap, more registers may have to be programmed. This also aligns the SPL behavior with the full Denali NAND driver, which sets these values in denali_hw_init(). Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-27mtd: spi-nor-core: Add octal mode supportVignesh Raghavendra
Add support for Octal flash devices. Octal flash devices use 8 IO lines for data transfer. Currently only 1-1-8 Octal Read mode is supported. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27mtd: spinand: winbond: Add support for W25N01GVRobert Marko
Linux has supported W25N01GV for a long time, so lets import it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-25mtd: denali: Drop custom dma mapping functionsVignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific common implementation Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-23nand: brcmnand: add bcm68360 supportPhilippe Reynes
This adds the nand support for chipset bcm68360. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-14zynq: mtd: nand: Remove hardcoded base addressesAshok Reddy Soma
Remove hardcoded base addresses of smc controller and nand controller. Get those addresses from dt and replace wherever they are used. Remove smc and nand base address from header file too. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14zynq: mtd: nand: Move zynq nand driver to driver modelAshok Reddy Soma
Move the zynq nand driver to driver model. Select DM_MTD if zynq nand controller (NAND_ZYNQ) is selected. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14mtd: nand: Remove hardcoded base address of nandAshok Reddy Soma
Remove hardcoded base address of nand and replace it with the value taken from device tree. Remove base address from header file too. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14mtd: nand: Move arasan nand driver to driver modelAshok Reddy Soma
Make changes to arasan nand driver to move it to driver model. Select DM_MTD if arasan nand driver is selected. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-07Merge tag 'u-boot-atmel-2020.04-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features for 2020.04 cycle This feature set is a patch series from Tudor Ambarus which includes parsing of the spi flash SFDP parser for SST flashes, and using those tables to retrieve unique saved per device MAC address. This is then used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-06Merge branch 'next'Tom Rini
Bring in the following merges: commit 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 Merge: 87f69f467a83 63618e71e89b Author: Tom Rini <trini@konsulko.com> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit 87f69f467a8335b171c71bf217d2625d515acd7c Merge: c0912f9bbfb2 4466b9970319 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commit c0912f9bbfb26dd03d189953678691b799d35b6e Merge: 533c9f5714bd a1d6dc3f8407 Author: Tom Rini <trini@konsulko.com> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit 533c9f5714bdba79dc6f2629284d4c1a08a611d1 Merge: 553cb0688782 033e18b47bd0 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit 553cb06887825314e74a9bdac337467c77d1db88 Merge: f39abbbc531e b4f98b3b16ec Author: Tom Rini <trini@konsulko.com> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
2019-12-27mtd: spi-nor-core: Fix static checker warningsVignesh Raghavendra
Static checker warns 'ret' variable may be used uninitialized in spi_nor_erase() and spi_nor_write() in case of zero length requests. Fix these warnings by checking for zero length requests and returning early. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-18mtd: spi-nor: ids: Add GigaDevice gd25q128Peter Robinson
Add gd25q128 128Mbit chip to spi-nor id table. Tested on Pinebook Pro Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-17mtd: spi: spi-nor-core: Add SST vendor specific SFDP parserTudor Ambarus
JESD216 allow vendors to define their own SFDP tables. Add SST SFDP parser. The vendor table is allocated using resource-managed kmalloc - the table will be freed on driver detach. It will be accessible by getting the UCLASS_SPI_FLASH's private data. The SST's SFDP table is particularly of interest because contains pre-programmed globally unique EUI-48 and EUI-64 identifiers. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-15mtd: spi: Export spi_flash_std_probe()Simon Glass
With of-platdata we need to create drivers for particular chips, or at least drivers that are separate from the standard code, since C structures are created by dtoc which are private to that driver. To avoid duplicating the probing code, export this probe function for use by these drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-04mtd: Makefile: deep cleanupMiquel Raynal
Move MTD-related lines out of the root Makefile. Put them in their respective directories. Enclose some of these new lines to skip them when building the SPL. MTD core files and some MTD device drivers are compiled in a mtd.o object and included in the final object only if MTD support is required (there are two different symbols for that, one for U-Boot and one for the SPL). Now that all defconfigs have been fixed, we can stop the logic where enabling a command selects the core files to compile. This logic is broken since selecting a symbol with a 'depends on' will not enforce this secondary dependency. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-12-04cmd: nand/sf: isolate legacy codeMiquel Raynal
The 'sf' command is not supposed to rely on the MTD stack, but both 'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite their location, these functions do not depend at all on the MTD stack. This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is selected, which is inconsistent with the current situation. Solve this by moving these three functions (which are only used by the above two commands) out of mtd_uboot.c and put them in a C file only compiled with cmd/sf.c and cmd/nand.c. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Don't export get_part function now] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-04mtd: spi: SPI_FLASH_MTD depends on MTDMiquel Raynal
It is already the case that all defconfigs with SPI_FLASH_MTD also declare using MTD, but let's make this consistent and enforce it in Kconfig. Most of the time SPI_FLASH_MTD is used in conjunction with UBI, which already depends on MTD. Suggested-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-12-04mtd: nand: add includes in NAND core to avoid warningsMiquel Raynal
Because of the include's game, when some files are compiled for a SPI NAND device, no warning appears. But when it is for a raw NAND device, GCC complains. Fix these warning by including <common.h>. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTDMiquel Raynal
Like in Linux, just use CONFIG_MTD to compile the MTD stack. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03mtd: rename CONFIG_MTD -> CONFIG_DM_MTDMiquel Raynal
CONFIG_MTD must be reserved for the MTD core. Like any other subsystem, prefix the symbol by DM when it comes to DM support. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> [trini: Add Kconfig files] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NANDMiquel Raynal
Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03mtd: mtdcore: Drop unused mtd_tableTom Rini
The array 'mtd_table' is unused in the code. Remove this as gcc doesn't always discard unused global variables. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move old EEPROM functions into a new headerSimon Glass
These functions do not use driver model but are still used. Move them to a new eeprom.h header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move command functions out of common.hSimon Glass
Move these functions into the command.h header file which is a better fit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move enable/disable_interrupts out of common.hSimon Glass
Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move interrupt functions into a new headerSimon Glass
These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02crc32: Use the crc.h header for crc functionsSimon Glass
Drop inclusion of crc.h in common.h and use the correct header directly instead. With this we can drop the conflicting definition in fw_env.h and rely on the crc.h header, which is already included. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-03nand: mxs_nand: add API for switching different BCH layoutsIgor Opaniuk
On i.MX7 in a sake of reducing the disturbances caused by a neighboring cells in the FCB page in the NAND chip, a randomizer is enabled when reading the FCB page by ROM bootloader. Add API for setting BCH to specific layout (and restoring it back) used by ROM bootloader to be able to burn it in a proper way to NAND using nandbcb command. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-10-30Merge tag 'u-boot-clk-23Oct2019' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-clk - Add I2C clocks for i.MX6Q CCF driver - Fix check in clk_set_default_parents() - Managed API to get clock from device tree - Fixes for core clock code (including sandbox regression tests)
2019-10-30Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- H6 dts(i) sync (Clément) - H6 PIO (Icenowy) - Fix pll1 clock calculation (Stefan) - H6 dram, half DQ (Jernej) - A64 OLinuXino eMMC (Sunil)
2019-10-25drivers: nand: brcmnand: fix nand_chip ecc layout structureWilliam Zhang
The current brcmnand driver is based on 4.18 linux kernel which uses mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from old kernel which does not use this new API and expect nand_chip.ecc.layout structure to be set. This cause nand_scan_tail function running into a bug check if the device has a different oob size than the default ones. This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7 that supports the ecc layout struture and replaces the mtd_set_ooblayout method Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-10-25nand: brcm: add BCM6368 supportÁlvaro Fernández Rojas
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-25spi-nor-ids: Add support for Adesto AT25SL321Fabio Estevam
Add an entry for the Adesto AT25SL321 SPI NOR chip. This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTDFrieder Schrempf
Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in SPL. They often rely on hacks in the board header files to include this option conditionally. To be able to fix this, we previously introduced a separate option SPL_SPI_FLASH_MTD. Therefore we can now adjust the Makefile and change the code in sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD). We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the header files to the according defconfigs. The affected boards are socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6 and da850evm. We do this all in one patch to guarantee bisectibility. This change was tested with buildman to make sure it does not introduce any regressions by comparing the resulting binary sizes. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entryVignesh Raghavendra
n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status register that indicates various errors that may be encountered during erase/write operations. Therefore add USE_FSR flag wherever missing. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25spi-nor: spi-nor-ids: Add entries for mt25q variantsVignesh Raghavendra
mt25q* flashes support stateless 4 byte addressing opcodes. Add entries for the same. These flashes have bit 6 set in 5th byte of READ ID response when compared to n25q* variants. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*Vignesh Raghavendra
Per datasheets of n25q256* and n25q512* not all variants of n25q256* and n25q512* support 4 Byte stateless addressing opcodes. Therefore drop SPI_NOR_4B_OPCODES flag from these entries Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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