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2016-12-02common: miiphyutil: Work and report phy address in hex in mdio cmdMichal Simek
It is confusing that mdio commands work and report phy id as decimal value when mii is working with hex values. For example: ZynqMP> mdio list gem: 21 - TI DP83867 <--> ethernet@ff0e0000 ZynqMP> mdio read ethernet@ff0e0000 0 Reading from bus gem PHY at address 21: 0 - 0x1140 ZynqMP> mii dump 21 0 Incorrect PHY address. Range should be 0-31 ... ZynqMP> mii dump 15 0. (1140) -- PHY control register -- (8000:0000) 0.15 = 0 reset U-Boot normally takes hex values that's why this patch is changing mdio command to handle hex instead of changing mii command to handle decimal values. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-29Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2016-11-28drivers: net: keystone_net: add rgmii link type support when parsing dtMugunthan V N
Add support to detect RGMII link interface from link-interface device tree entry. Also rename the existing link type enums so that it provides meaningful interface like SGMII. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reported-by: Sekhar Nori <nsekhar@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-28sun8i_emac: Fix mdio read sequencePhilipp Tomsich
To send a parametrized command to the PHY over MDIO, we should write the data first, the trigger the execution by the command register write. Fix the access pattern in our MDIO write routine. Apparently this doesn't really matter with the Realtek PHY on the Pine64, but other PHYs (which require more setup) will choke on the wrong order. [Andre: add commit message] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
2016-11-23powerpc: T4080: Drop configuration for T4080York Sun
There is no T4080 target. Drop related macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T4240: Remove macro CONFIG_PPC_T4240York Sun
Use CONFIG_ARCH_T4240 from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T4160: Remove macro CONFIG_PPC_T4160York Sun
Use CONFIG_ARCH_T4160 instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T2080, T2081: Remove macro CONFIG_PPC_T2080 and CONFIG_PPC_T2081York Sun
Use CONFIG_ARCH_T2080 and CONFIG_ARCH_T2081 instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T1042: Remove macro CONFIG_PPC_T1042York Sun
Replace CONFIG_PPC_T1042 with ARCH_T1024 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T1040: Remove macro CONFIG_PPC_T1040York Sun
Replace CONFIG_PPC_T1040 with ARCH_T1040 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T1024: Remove macro CONFIG_PPC_T1024York Sun
Replace CONFIG_PPC_T1024 with ARCH_T1024 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T1023: Remove macro CONFIG_PPC_T1023York Sun
Replace CONFIG_PPC_T1023 with ARCH_T1023 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: B4420: Remove macro CONFIG_PPC_B4420York Sun
Replace CONFIG_PPC_B4420 with ARCH_B4420 in Kconfig and clean up existing macros.
2016-11-23powerpc: B4860QDS: Remove macro CONFIG_B4860QDSYork Sun
Use CONFIG_TARGET_B4860QDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: B4860: Remove macro CONFIG_PPC_B4860York Sun
Replace CONFIG_PPC_B4860 with ARCH_B4860 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P5040: Remove macro CONFIG_P5040York Sun
Replace CONFIG_P5040 with ARCH_P5040 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P5020: Remove macro CONFIG_PPC_P5020York Sun
Replace CONFIG_PPC_P5020 with ARCH_P5020 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P4080: Remove macro CONFIG_PPC_P4080York Sun
Replace CONFIG_PPC_P4080 with ARCH_P4080 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P3041: Remove macro CONFIG_PPC_P3041York Sun
Replace CONFIG_PPC_P3041 with ARCH_P3041 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P2041: Remove macro CONFIG_PPC_P2041York Sun
Replace CONFIG_PPC_P2041 with ARCH_P2041 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P1017: Drop configuration for P1017York Sun
P1017 is a single-core version of P1023. There is no P1017 target configured. Drop related macros. P1017 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P1023: Remove macro CONFIG_P1023York Sun
Replace CONFIG_P1023 with ARCH_P1023 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-21driver: net: ldpaa_eth: Fix missing bracket issuePriyanka Jain
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-17Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2016-11-17 Highlights this time around: - x86 efi_loader support - hello world efi test case - network device name is now representative - terminal output reports modes correctly - fix psci reset for ls1043/ls1046 - fix efi_add_runtime_mmio definition for x86 - efi_loader support for ls2080
2016-11-17ls2080: Exit dpaa only right before exiting U-BootAlexander Graf
On ls2080 we have a separate network fabric component which we need to shut down before we enter Linux (or any other OS). Along with that also comes configuration of the fabric using a description file. Today we always stop and configure the fabric in the boot script and (again) exit it on device tree generation. This works ok for the normal booti case, but with bootefi the payload we're running may still want to access the network. So let's add a new fsl_mc command that defers configuration and stopping the hardware to when we actually exit U-Boot, so that we can still use the fabric from an EFI payload. For existing boot scripts, nothing should change with this patch. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: York Sun <york.sun@nxp.com> [agraf: Fix x86 build]
2016-11-15net: zynq_gem: Correct SGMII enable bit settingSiva Durga Prasad Paladugu
Correct the SGMII enable bit position to 27 instead of 31. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-15net: zynq_gem: Modify the nwcfg bit definitionsSiva Durga Prasad Paladugu
Modify the nwcfg bit definitions to have 32-bit by removing the extra nibble. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-07net: mvgbe: Fix build error with CONFIG_PHYLIBChris Packham
Commit 5a49f17481bb ("net: mii: Use spatch to update miiphy_register") updated the mvgbe implementation of smi_reg_read/smi_reg_write. Prior to that change mvgbe_phy_read and mvgbe_phy_write where used as wrappers to satisfy the phylib APIs. Because these functions weren't updated in that commit build errors where triggered when CONFIG_PHYLIB was enabled. Fix these build errors by removing mvgbe_phy_read and mvgbe_phy_write and using smi_reg_read/smi_reg_write directly. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-07net: phy: micrel: center FLP burst timing at 16msAsh Charles
Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms specified by the IEEE802.3 standard from the chip's default of 8ms. For more details, see the "Auto-Negotiation Timing" section of the KSZ9031RNX datasheet. [1] https://patchwork.kernel.org/patch/6558371/ Signed-off-by: Ash Charles <ash.charles@savoirfairelinux.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-07net: add driver for Synopsys Ethernet QoS deviceStephen Warren
This driver supports the Synopsys Designware Ethernet QoS (Quality of Service) a/k/a eqos IP block, which is a different design than the HW supported by the existing designware.c driver. The IP supports many options for bus type, clocking/reset structure, and feature list. This driver currently supports the specific configuration used in NVIDIA's Tegra186 chip, but should be extensible to other combinations quite easily, as explained in the source. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # V1 Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-31Fix spelling of "resetting".Vagrant Cascadian
Cover-Letter: Fixes several spelling errors for the words "resetting", "extended", "occur", and "multiple". Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: common/Kconfig configs/dms-ba16_defconfig
2016-10-26net: Kconfig: Add FEC_MXC entryJagan Teki
Added kconfig for FEC_MXC driver. Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-24Fix codying style broken by recent libfdt syncMasahiro Yamada
Commit b02e4044ff8e ("libfdt: Bring in upstream stringlist functions") broke codying style in some places especially by inserting an extra whitespace before fdt_stringlist_count(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-23Remove some merge markersSimon Glass
These two files have patch merge markers in them, within comments or strings. Remove then, so that a search for merge markers does not show up matches in these files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-10-13Merge git://git.denx.de/u-boot-fdtTom Rini
2016-10-13libfdt: Sync fdt_for_each_subnode() with upstreamSimon Glass
The signature for this macro has changed. Bring in the upstream version and adjust U-Boot's usages to suit. Signed-off-by: Simon Glass <sjg@chromium.org> Update to drivers/power/pmic/palmas.c: Signed-off-by: Keerthy <j-keerthy@ti.com> Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
2016-10-13libfdt: Bring in upstream stringlist functionsSimon Glass
These have now landed upstream. The naming is different and in one case the function signature has changed. Update the code to match. This applies the following upstream commits by Thierry Reding <treding@nvidia.com> : 604e61e fdt: Add functions to retrieve strings 8702bd1 fdt: Add a function to get the index of a string 2218387 fdt: Add a function to count strings Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-13rtl8169: fix cache misalignment message on transmit.Peter Chubb
The call to flush cache on the transmit buffer was misplaced (for very short packets) and asked to flush less than a cacheline. Move the flush cache call to after a short packet has been padded to minimum length (so the padding is flushed too), and round the size up to a cacheline. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13net: mvneta: fix typo in commentChris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13net: mv88e61xx: Add support for fixed linksChris Packham
On some boards these switches are wired directly into a SERDES interface on another Ethernet MAC. Add the ability to specify these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines a bit mask of these fixed ports. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13net: Add support for mv88e609x switchesChris Packham
The Marvell Link Street mv88e60xx is a series of FastEthernet switch chips, some of which also support Gigabit ports. It is similar to the mv88e61xx series which support Gigabit on all ports. The main difference is the number of ports. Which affects the PORT_COUNT define and the size of the mask passed to mv88e61xx_port_set_vlan(). Other than that it's just a matter of adding the appropriate chip IDs. Signed-off-by: Chris Packham <judge.packham@gmail.com> Cc: Joshua Scott <joshua.scott@alliedtelesis.co.nz> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13driver: net: cpsw: add support for RGMII id mode support and RMII clock ↵Mugunthan V N
source selection cpsw driver supports only selection of phy mode in control module but control module has more setting like RGMII ID mode selection, RMII clock source selection. So ported to cpsw-phy-sel driver from kernel to u-boot. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13drivers: net: phy: atheros: add separate config for AR8031Mugunthan V N
In the current driver implementation, config() callback is common for AR8035 and AR8031 phy. In config() callback, driver tries to configure MMD Access Control Register and MMD Access Address Data Register unconditionally for both phy versions which leads to auto negotiation failure in AM335x EVMsk second port which uses AR8031 Giga bit RGMII phy. Fixing this by adding separate config for AR8031 phy. Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXIDAndrea Merello
This adds support for internal delay on RX and TX on RGMII interface for the AR8035 phy. This is basically the same Linux driver do. Tested on a Zynq Zturn board (for which u-boot support in is my tree; first patch waiting ML approval) Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-06Various, accumulated typos collected from around the tree.Robert P. J. Day
Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
2016-10-01net, macb: fix misaligned cache operation warningHeiko Schocher
when using tftp on the smartweb board, it prints a lot of CACHE: Misaligned operation at range [23b2e000, 23b2e100] warnings ... fixed them. Signed-off-by: Heiko Schocher <hs@denx.de>
2016-09-27net: mvneta: Add support for Armada 3700 SoCStefan Roese
This patch adds support for the Armada 3700 SoC to the Marvell mvneta network driver. Not like A380, in Armada3700, there are two layers of decode windows for GBE: First layer is: GbE Address window that resides inside the GBE unit, Second layer is: Fabric address window which is located in the NIC400 (South Fabric). To simplify the address decode configuration for Armada3700, we bypass the first layer of GBE decode window by setting the first window to 4GB. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-09-27net: mvneta: Make driver 64bit safeStefan Roese
The mvneta driver is also used on the ARMv8 64bit Armada 3700 SoC. This patch fixes the compilation warnings seen on this 64bit platform. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-09-27net: mvneta: Round up top tx buffer boundaries for dcache opsStefan Roese
check_cache_range() warns that the top boundaries are not properly aligned when flushing or invalidating the buffers and make these operations fail. This gets rid of the warnings: CACHE: Misaligned operation at range ... Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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