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2019-01-24net: phy: Add clause 45 identifier to phy_devicePankaj Bansal
The phy devices can be accessed via clause 22 or via clause 45. This information can be deduced when we read phy id. if the phy id is read without giving any MDIO Manageable Device Address (MMD), then it conforms to clause 22. otherwise it conforms to clause 45. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: phy: Move fixed link code to separate routineSiva Durga Prasad Paladugu
This patch moves fixed-link functionality code to a separate routine inorder to make it more modular and cleaner. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24zynq-gem: Use appropriate cache flush/invalidate for RX and TXStefan Theil
The cache was only flushed before *transmitting* packets, but not when receiving them, leading to an issue where new packets were handed to the receive handler with old contents in cache. This only happens when a lot of packets are received without sending packages every now and then. Also flushing the receive buffers in the transmit function makes no sense and can be removed. Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-23net: add MSCC Ocelot switch supportGregory CLEMENT
This patch adds support for the Microsemi Ethernet switch present on Ocelot SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-18Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
Add TFA boot flow for more boards Add TFA boot defconfig for ls1088a and ls2088a. Add dts fixup for PCIe endpoint and root complex.
2019-01-17Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mipsTom Rini
- MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised SPL linker script - MIPS: bcm6368: fix restart flow issues - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards - MIPS: mt7688: small fixes and enhancements - mmc: compile-out write support if disabled
2019-01-17fsl-layerscape: dpaa: fix fsl-mc status in fdt with bootefiMian Yousaf Kaukab
fsl-mc lazyapply command applies dpl from efi_exit_boot_services(). Status of fsl-mc node in working fdt is updated at this stage. However, an efi application like grub may already have copied the fdt. So the updates to fdt done at efi_exit_boot_services() may not be visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply command is used. Fixes: b7b8410a8f (ls2080: Exit dpaa only right before exiting U-Boot) Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-16net: bcm6368: fix restart flow issuesÁlvaro Fernández Rojas
Correctly enable/disable bcm6368-net controller to avoid flow issues. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-15Merge tag 'dm-pull-15jan19' of git://git.denx.de/u-boot-dmTom Rini
Fix recent changes to serial API for driver model Buildman clang support and a few fixes Small fixes to 'dm tree' and regmap test Improve sandbox build compatibility A few other minor fixes
2019-01-14net: Fix error handling in sb_eth_raw_ofdata_to_platdata()Simon Glass
At present this stores the error number in an unsigned int so an error is never detected. Use the existing signed variable instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-14ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCsWeijie Gao
This patch adds ethernet support for Mediatek ARM-based SoCs, including a minimum setup of the integrated switch. Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Tested-By: "Frank Wunderlich" <frank-w@public-files.de>
2019-01-01Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini
imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
2019-01-01imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan
Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
2018-12-26phy: Fix u-boot coruption when fixed-phy is usedMichal Simek
When fixed-link phy is used subnode offset is used as phy address. This number is bigger then space allocated for bus structure (allocated via mdio_alloc). bus->phymap[] array has PHY_MAX_ADDR size (32). That's why writing bus->phymap[addr] where addr is < 0 or > PHY_MAX_ADDR is causing write to memory which can caused full U-Boot crash. The patch is checking if address is in correct range. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-12-19net: add support for bcm6368-enetÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19net: add support for bcm6348-enetÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-10Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
Add TFA boot flow for some Layerscape platforms Add support for lx2160a SoC [trini: Add a bunch of missing MAINTAINERS entries] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-08lib: merge CRC16-CCITT into u-boot/crc.hPhilipp Tomsich
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32 and CRC32-C already have their prototypes in a single header file, it seems a good idea to also include CRC16-CCITT in the same. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06armv8: lx2160a: Add LX2160A SoC SupportPriyanka Jain
LX2160A Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC, 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers, 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs, 4 TZASC instances, etc. SoC personalites: LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06net: fm: add TFABOOT supportRajesh Bhagat
Adds TFABOOT support and allows to pick FMAN firmware on basis of boot source. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-05Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dmTom Rini
Minor sandbox enhancements / fixes tpm improvements to clear up v1/v2 support buildman toolchain fixes New serial options to set/get config
2018-12-05Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05sandbox: net: Correct name copy in eth_raw_bus_post_bind()Simon Glass
We cannot be sure that the interface name takes up the full length of the space available to it. Use strcpy() instead of memcpy() in this case. This corrects a valgrind warning. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-03Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
2018-12-03net: zynq_gem: Add check for 64-bit dma support by hardwareSiva Durga Prasad Paladugu
This patch throws an error if 64-bit support is expected but DMA hardware is not capable of 64-bit support. It also prints a debug message if DMA is capable of 64-bit but not using it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2018-12-03net: zynq_gem: Added 64-bit addressing supportVipul Kumar
This patch adds 64-bit addressing support for zynq gem. This means it can perform send and receive operations on 64-bit address buffers. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2018-11-29Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogicTom Rini
Cleanup and update towards support for Amlogic Meson AXG SoCs : - mmc: meson-gx: Add AXG compatible - net: designware: add meson meson compatibles - Amlogic Meson cleanup for AXG SoC support
2018-11-27spi: Remove unused spi_initJagan Teki
Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-11-26net: designware: add meson meson axg compatibleNeil Armstrong
Add the compatible string for the upcoming Amlogic AXG SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26net: designware: add meson meson gxbb compatibleNeil Armstrong
Add the compatible string for the Amlogic GXBB SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-23sun8i_emac: add support for setting EMAC TX/RX delayIcenowy Zheng
Some boards have the EMAC TX/RX lanes wired with a different length with the clock lane, which can be workarounded by setting a TX/RX delay in the EMAC. This kind of delays are already defined in the newest device tree binding of dwmac-sun8i, which has already entered linux-next. Add support for setting these delays. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-05driver: net: ti: keystone_net: switch to use common mdio libGrygorii Strashko
Update TI Keystone 2 driver to re-use common mdio lib. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05driver: net: ti: cpsw: switch to use common mdio libGrygorii Strashko
Update TI CPSW driver to re-use common mdio lib Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05driver: net: ti: introduce common mdio support libraryGrygorii Strashko
All existing TI SoCs network HW have similar MDIO implementation, so introduce common mdio support library which can be reused by TI networking drivers. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05driver: net: ti: cpsw: update to use SPDX identifierGrygorii Strashko
Update to use SPDX license identifier. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05drivers: net: keystone_net: drop non dm codeGrygorii Strashko
Networking support for all TI K2 boards converted to use DM model and CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop unused non DM K2 networking code. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05configs: net: convert DRIVER_TI_KEYSTONE_NET kconfigGrygorii Strashko
Convert DRIVER_TI_KEYSTONE_NET to Kconfig. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05driver: net: consolidate ti's code in separate folderGrygorii Strashko
Add drivers/net/ti/ folder and move all TI's code in this folder for better maintenance. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05net: phy: mscc: add support for VSC8574 PHYQuentin Schulz
The VSC8574 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX, 1000BASE-X and triple-speed copper SFP capable, can communicate with the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and can set the blinking pattern of each of its 4 LEDs, supports SyncE as well as HP Auto-MDIX detection. This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the MAC. The VSC8574 has also an internal Intel 8051 microcontroller whose firmware needs to be patched when the PHY is reset. If the 8051's firmware has the expected CRC, its patching can be skipped. The microcontroller can be accessed from any port of the PHY, though the CRC function can only be done through the PHY that is the base PHY of the package (internal address 0) due to a limitation of the firmware. The GPIO register bank is a set of registers that are common to all PHYs in the package. So any modification in any register of this bank affects all PHYs of the package. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: phy: mscc: factorize part of config function for VSC8584Quentin Schulz
Part of the config is common between the VSC8584 and the VSC8574, so to prepare for the upcoming support of VSC8574, use the phy_device.priv pointer that will keep the function that holds code that is PHY-specific and that should be called during config function. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: phy: mscc: add support for VSC8584 PHYQuentin Schulz
The VSC8584 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX, 1000BASE-X and triple-speed copper SFP capable, can communicate with the MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set the blinking pattern of each of its 4 LEDs, supports hardware offloading of MACsec and supports SyncE as well as HP Auto-MDIX detection. This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the MAC. The VSC8584 has also an internal Intel 8051 microcontroller whose firmware needs to be patched when the PHY is reset. If the 8051's firmware has the expected CRC, its patching can be skipped. The microcontroller can be accessed from any port of the PHY, though the CRC function can only be done through the PHY that is the base PHY of the package (internal address 0) due to a limitation of the firmware. The GPIO register bank is a set of registers that are common to all PHYs in the package. So any modification in any register of this bank affects all PHYs of the package. The revA of the VSC8584 PHY (which is not and will not be publicly released) should NOT patch the firmware of the microcontroller or it'll make things worse, the easiest way is just to not support it. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: Add support for the Aspeed SoCCédric Le Goater
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits). Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: add clock supportCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: handle timeouts when transmittingCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: convert the RX/TX descriptor arraysCédric Le Goater
Use simple arrays under the device priv structure to hold the RX and TX descriptors and handle memory coherency by invalidating or flushing the d-cache when required. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: add MDIO bus and phylib supportCédric Le Goater
Implement the MDIO bus read/write functions using the readl_poll_timeout() routine, initialize the bus and scan for the PHY. RGMII and RMII mode are supported. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: use setbits_le32() in the reset methodCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: convert to driver modelCédric Le Goater
The driver is based on the previous one and the code is only adapted to fit the driver model. The support for the Faraday ftgmac100 controller is the same with MAC and MDIO bus support for RGMII/RMII modes. Configuration is updated to enable compile again. At this stage, the driver compiles but is not yet functional. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: use the aligned() macroCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05net: ftgmac100: use the BIT() macroCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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