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path: root/drivers/net
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2019-08-22drivers: net: mc: Report extra memory to LinuxMeenakshi Aggarwal
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved. But MC support to work with 128MB or 256MB DDR memory also, in this case, rest of the memory is not usable. So reporting this extra memory to Linux through dtb memory fixup. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-11Drop PCMCIASimon Glass
This is no-longer used in U-Boot and has not been converted to driver model. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Drop environment.h header file where not neededSimon Glass
This header file is now only used by files that access internal environment features. Drop it from various places where it is not needed. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_get() to env.hSimon Glass
Move env_get() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_set() to env.hSimon Glass
Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_set_hex() to env.hSimon Glass
Move env_set_hex() over to the new header file along with env_set_addr() which uses it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11env: Move env_get_f() to env.hSimon Glass
Move this function over to the new header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11env: Move get_env_id() to env.hSimon Glass
Move this function over to the new header file. Also rename it to have an env_ prefix like the other functions. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-09net: sh_eth: Fix 64bit build warningsMarek Vasut
Fix various type warnings when building this driver for 64bit machine. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09net: sh_eth: Add R8A77980 V3H gether supportMarek Vasut
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth driver, add them to support ethernet on R8A77980. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-07-29doc: arch: sandbox: Replace all the instances of README.sandboxKeerthy
commit 49116e6d236d ("doc: arch: Convert README.sandbox to reST") Moves README.sandbox to doc/arch. Replace all the existing instances to point to the right documentation file. Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-07-27Merge tag 'u-boot-imx-20190719' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20190719 - CCF for i.MX6 - nandbcb command to write SPL into NAND - Switch to DM (i.MX28) - Boards: Toradex, engicam, DH - Fixes for i.MX8 - Fixes for i.MX7ULP Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-25net: sun8i_emac: Test the correct phyEmmanuel Vadot
H3/H5 can either use the internal phy or an external one. Before getting clock and resets for the internal phy, test that we are using it because otherwise it break emac when using an external phy. Tested-on: OrangePi PC2 (H5) Fixes: 2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support) Signed-off-by: Emmanuel Vadot <manu@freebsd.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: davinci_emac: convert to using the driver modelBartosz Golaszewski
Now that we removed all legacy boards selecting TI_EMAC we can completely convert the driver code to using the driver model. This patch also updates all remaining users of davinci_emac. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2019-07-25net: macb: Fix check for little-endian system in gmac_configure_dma()Anup Patel
Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime whether underlying system is little-endian or big-endian. This way we are not dependent on any U-Boot specific OR compiler specific macro to check system endianness. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: Extend MACB driver for SiFive Unleashed boardAnup Patel
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select different TX clock for 1000mbps vs 10/100mbps. This patch adds SiFive MACB compatible string and extends the MACB ethernet driver to change TX clock using TX_CLK_SEL register for SiFive MACB. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: tsec: Change compatible strings to match LinuxVladimir Oltean
In the case of the tsec network driver, so far there has been no mainline user of DM_ETH where the DT bindings get used. In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string was made up for the documentation, but there is no mainline code that parses the "compatible" property anyway. In both cases, there are no DT blobs that contain the old strings. So change the documentation to "fsl,etsec2" for the Ethernet ports and "fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also uses, at least for LS1021A. More compatible strings can be added once other (PowerPC) SoCs are migrated to DM_ETH. The current ls1021a.dtsi doesn't match what was documented for the MDIO buses anyway (the "compatible" is "gianfar" currently). This will be fixed in the next patch. Fixes: 69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller") Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: tsec: Common handling of MAC station address for DM_ETHVladimir Oltean
In tsec_init, the MAC address is retrieved from 2 different structures depending on whether DM_ETH is enabled or not. But since the field name is the same inside both structures, we can conditionally define the structure of the correct type and simplify the assignments. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Make errors visibleVladimir Oltean
This replaces debug() calls with printf() so that it is immediately obvious from the console that something is wrong. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Reverse Christmas tree notationVladimir Oltean
This is a cosmetic patch that reorders variable definitions in the inverse order of their line length, where possible. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Fix offset of MDIO registers for DM_ETHVladimir Oltean
By convention, the eTSEC MDIO controller nodes are defined in DT at 0x2d24000 and 0x2d50000, but actually U-Boot does not touch the interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM, MDIO_EMAPM). That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM, MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at the 0x520 offset. So shift the DT-defined register map by the offset of MDIO_MIIMCFG when mapping the MDIO bus registers. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Refactor the readout of the tbi-handle propertyVladimir Oltean
The point of this patch is to eliminate the use of the locally-defined "reg" variable (which interferes with next patch) and simplify the fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is missing. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net/macb: increase RX buffer size for GEMRamon Fried
Macb Ethernet controller requires a RX buffer of 128 bytes. It is highly sub-optimal for Gigabit-capable GEM that is able to use a bigger DMA buffer. Change this constant and associated macros with data stored in the private structure. RX DMA buffer size has to be multiple of 64 bytes as indicated in DMA Configuration Register specification. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: apply sane DMA configurationRamon Fried
DMA configuration was heavily dependent on the HW defaults, add function to properly set the required fields, including the new dma_burst_length. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: add dma_burst_length configRamon Fried
GEM support higher DMA burst writes/reads than the default (4). add configuration structure with dma burst length so it could be applied later to DMA configuration. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: add support for SGMII phy interfaceRamon Fried
This patch adds support for the sgmii phy interface, available only to DM users, dictated by current driver design. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: use bit access macro from header fileRamon Fried
macb.h provides macros for reading/setting bitfields, in macb registers and descriptors. use that instead of redefining them in the source file. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: add support for faster clk ratesRamon Fried
add support for clock rates higher than 2.4Mhz Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: sync header definitions as taken from LinuxRamon Fried
Few registers and bits were added by Cadence and they were not updated in the headers. Take the latest definitions as defined in Linux header (5.1) that also includes some comments about existing registers. One register was improperly named (UR), fix that. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25drivers: net: driver for MDIO muxes controlled over I2CAlex Marginean
This driver is used for MDIO muxes driven over I2C. This is currently used on Freescale LS1028A QDS board, on which the physical MDIO MUX is controlled by an on-board FPGA which in turn is configured through I2C. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: designware: use 'phy_connect' instead of open codedSimon Goldschmidt
Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev' both deduplicates code and adds support for 'fixed-link'. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25drivers: net: fsl_enetc: add support for SGMII 2500Alex Marginean
SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle this case in the enetc sgmii init code. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25drivers: net: apply serdes configuration for ENETC Ethernet interfacesAlex Marginean
Ethernet interfaces using serial protocols go through the serdes block integrated in the SoC. This is accessed over dedicated internal MDIOs which are part of the Ethernet PCI functions. Set up serdes at _start, along with other protocol specific port/MAC configuration. MDIO code is shared with enetc_mdio, read/write functions are exported from fsl_enetc_mdio for this reason. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25drivers: net: add NXP ENETC MDIO driverAlex Marginean
Adds a driver for the MDIO interface currently integrated in LS1028A SoC. This MDIO interface is shared by multiple ethernet interfaces and is presented as a stand-alone PCI function on the SoC ECAM. Ethernet has a functional dependency on MDIO, for simplicity there is a single config option for both. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25drivers: net: add NXP ENETC ethernet driverAlex Marginean
Adds a driver for NXP ENETC ethernet controller currently integrated in LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces are presented as PCI EPs on the SoC ECAM. Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com> Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-19net: fec: Enable support for i.MX28 DM_ETH in the fec_mxc.c driverLukasz Majewski
The fec_mxc.c driver can be reused by i.MX28 when DM_ETH is enabled. One only needs to add proper compatible and dependency on FEC_MXC in the Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2019-07-18net: designware: remove mdio bus on probe failureSimon Goldschmidt
The designware eth driver registers an mdio bus during probe, but if no PHY is found, this bus is never removed although probe failes and the driver is shown as not probed in the dm tree. This later leads to errors when e.g. the mii or mdio commands try to use available mdio buses because the mdio bus is still registered but all corresponding data structures are invalid because probe failed. Fix this by unregistering the mdio bus on probe failure (just as it is unregistered in the .remove callback, too). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18test: dm: add a test for MDIO MUX DM uclassAlex Marginean
Adds a test using a makeshift MDIO MUX. The test is based on the existing MDIO test. It uses the last emulated PHY register to verify MUX selection. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-18test: dm_mdio: add a 2nd register to the emulated PHYAlex Marginean
This 2nd register is used by the follow-up MDIO MUX test. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18net: add MDIO_MUX DM classAlex Marginean
Adds a class for MDIO MUXes, which control access to a series of downstream child MDIOs. MDIO MUX drivers are required to implement a select function used to switch between child buses. MUX children are registered as MDIO buses and they can be used just like regular MDIOs. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18drivers: net: phy: Ignore PHY ID 0 during PHY probingAlex Marginean
Current code fails to probe some C45 PHYs that also respond to C22 reads. This is the case for PHYs like Aquantia AQR112, Marvell 88X2242 (as previously posted on the u-boot list). If the PHY ID reads all 0s just ignore it and try the next devad. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18drivers: net: phy: Use Aquantia driver for AQR112, AQR412Alexandru Marginean
adds AQR112 and AQR412 to the list of supported PHYs using existing AQR code. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: macb: Add support for 1000-baseXRadu Pirea
Macb can be used with Xilinx PCS/PMA PHY in fpga which is a 1000-baseX phy(lpa 0x41e0). This patch adds checks for LPA_1000XFULL and LPA_1000XHALF bits. Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: macb: Fixed reading MII_LPA registerRadu Pirea
If macb is gem and is gigabit capable, lpa value is not read from the right register(MII_LPA) and is read from MII_STAT1000. This patch fixes reading of the lpa value. Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driverKeerthy
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addrKeerthy
Use phys_addr_t for mdio_base address to avoid build warnings on arm64 and dra7. Cast it to uintprt_t before assigning to regs. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: phy: cortina: Use block layer to read from mmcYinbo Zhu
This patch is to use block layer to read from mmc in cortina Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: mscc: refactor mscc_miimHoratiu Vultur
Because all MSCC SoC use the same MDIO bus, put the implementation in one common file(mscc_miim) and make all the other MSCC network drivers to use these functions. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15test: dm: add MDIO testAlex Marginean
A very simple test for DM_MDIO, mimicks a register write/read through the sandbox bus to a dummy PHY. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: introduce MDIO DM class for MDIO devicesAlex Marginean
Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as stand-alone devices. Useful in particular for systems that support DM_ETH and have a stand-alone MDIO hardware block shared by multiple Ethernet interfaces. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit (git 2.34.1) at 2025-01-08 18:02:11 +0000