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path: root/drivers/net
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2019-10-25net: mt7628-eth: add support to isolate LAN/WAN portsWeijie Gao
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to prevent LAN devices from getting IP address from WAN. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25net: mt7628-eth: free rx descriptor on receiving failureWeijie Gao
When received a packet with an invalid length recorded in rx descriptor, we should free this rx descriptor to allow us to continue to receive following packets. Without doing so, u-boot will stuck in a dead loop trying to process this invalid rx descriptor. This patch adds a call to mt7628_eth_free_pkt() after received an invalid packet length. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25net: mt7628-eth: make phy link up detection optional via DTWeijie Gao
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port). Although in IOT mode only port0 is usable, the phy0 is still connected to the switch, not the ethernet gmac directly. This patch rewrites it and makes it optional. It can be turned on by adding mediatek,poll-link-phy = <?> explicitly into the eth node. By default the driver is switch mode with all 5 phy ports working without link detection. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy resetWeijie Gao
This patch removes hardcoded gpio settings as they have been replaced by pinctrl in dts, and also replaces regmap-based phy reset with a more generic reset controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-09Merge tag 'xilinx-for-v2020.01' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.01 FPGA: - Enable fpga loading on Versal - Minor fix Microblaze: - Fix LMB configurations to support initrds - Some other cleanups Zynq: - Minor config/dt changes - Add distro boot support for usb1 and mmc1 - Remove Xilinx private boot commands and use only distro boot ZynqMP: - Kconfig cleanups, defconfig updates - Update some dt files - Add firmware driver for talking to PMUFW - Extend distro boot support for jtag - Add new IDs - Add system controller configurations - Convert code to talk firmware via mailbox or SMCs Versal: - Add board_late_init() - Add run time DT memory setup - Add DFU support - Extend distro boot support for jtag and dfu - Add clock driver - Tune mini configurations Xilinx: - Improve documentation (boot scripts, dt binding) - Enable run time initrd_high calculation - Define default SYS_PROMPT - Add zynq/zynqmp virtual defconfig Drivers: - Add Xilinx mailbox driver for talking to firmware - Clean zynq_gem for Versal - Move ZYNQ_HISPD_BROKEN to Kconfig - Wire genphy_init() in phy.c - Add Xilinx gii2rgmii bridge - Cleanup zynq_sdhci - dwc3 fix - zynq_gpio fix - axi_emac fix Others: - apalis-tk1 - clean config file
2019-10-08net: xilinx_axiemac: Fill the phy node pointer in phydevSiva Durga Prasad Paladugu
This patch assings the phynode pointer to the phydev node as it is needed later in the corresponding phy driver to read phy properties from DT. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08net: phy: Add gmiitorgmii converter supportSiva Durga Prasad Paladugu
This patch adds support for gmiitorgmii converter. This converter sits between the MAC and the external phy MAC <==> GMII2RGMII <==> RGMII_PHY. The ethernet driver probes this bridge and this bridge driver probes real phy driver and invokes the real phy functionalities as requested. This bridge just needs to be configured based on real phy negotiated speed and duplex. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08net: phy: Define init routine and register generic phy driverSiva Durga Prasad Paladugu
This patch define init routine for generic phy driver and registers it using phy_register as this generic phy driver also needs to be relocated incase of manual reloc. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08net: zynq_gem: Remove check for VersalSiva Durga Prasad Paladugu
This patch removes check for Versal platform in gem driver as it now supports clock setting through clock framework. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08net: zynq_gem: Add new versal compatible stringSiva Durga Prasad Paladugu
This patch adds new versal compatible string to GEM driver for Versal platform. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08net: gem: Remove DECLARE_GLOBAL_DATA_PTR from gem driverMichal Simek
GD is not used anywhere that's why there is no reason to have this macro in the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08net: macb: Add sam9x60-macb compatibility stringNicolas Ferre
Add this new compatibility string for matching sam9x60 product macb. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-07NET: DW: fix regression for ARC boardsEugeniy Paltsev
The commit 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac") breaks designware ethernet for all ARC boards. It removes "altr, socfpga-stmmac" compatible from "drivers/net/designware.c" without changing compatible in the boards which use it. Fix that by adding "snps,arc-dwmac-3.70a" compatible string to "drivers/net/designware.c" and using it in ARC boards device tree. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-09-04net: macb: Fix rx buffer cache handlingStefan Roese
With commit c6d07bf440bc ("net/macb: increase RX buffer size for GEM") ethernet support does not work any more with d-cache enabled on the AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096 to 128 but this change was not refected in the rx_buffer flush and invalidate functions, as these also use this macro. This patch now fixes this by calculating the rx buffer size correctly again in those functions. With this change, ethernet works again reliably on my AT91SAM board. Signed-off-by: Stefan Roese <sr@denx.de> Fixes: c6d07bf440bc ("net/macb: increase RX buffer size for GEM") Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: designware: drop compatible altr, socfpga-stmmacRalph Siemsen
The same compatible = "altr,socfpga-stmmac" appears in both drivers/net/designware.c and drivers/net/dwmac_socfgpa.c, creating ambiguity in which driver will be bound. For Intel/Altera SoC devices, dwmac_socfpga.c is the correct driver. So drop the compatible string from designware.c. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04Revert "net: macb: Fixed reading MII_LPA register"Bin Meng
This reverts commit 1b0c9914cc75d1570359181ebd493cd5746cb0ed. Commit 1b0c9914cc75 ("net: macb: Fixed reading MII_LPA register") causes 100Mbps does not work any more with SiFive FU540 GEM on the HiFive Unleashed board. Revert it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: fsl_enet_mdio: fix missing terminator in PCI ID arrayAlex Marginean
It was missing in the original submission and not having it in place causes issues with probing of PCI devices. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_et_qos: update weak function board_interface_eth_initPatrick Delaunay
Align the board and driver prototype for board_interface_eth_init to avoid execution issue (the interface_type parameter is defined as int or phy_interface_t). To have a generic weak function (it should be reused by other driver) I change the prototype to use directly udevice. This prototype is added in netdev.h to allow compilation check and avoid warning when compiling with W=1 on file board/st/stm32mp1/stm32mp1.c warning: no previous prototype for 'board_interface_eth_init'\ [-Wmissing-prototypes] int board_interface_eth_init(int interface_type, .... ^~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_eth_qos: Change eqos_ops function to staticPatrick Delaunay
This patch solves many warnings when compiling with W=1: warning: no previous prototype for '....' [-Wmissing-prototypes] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: pfe_eth: undefined return valueHeinrich Schuchardt
Do not use random value from stack as return value of pfe_phy_write(). Indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04test: dm_mdio: avoid out of bounds accessHeinrich Schuchardt
SANDBOX_PHY_REG_CNT is not an allowable index for the array u16 reg[SANDBOX_PHY_REG_CNT]. Identified by cppcheck. Fixes: b47edf8069cc ("test: dm_mdio: add a 2nd register to the emulated PHY") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: mvpp2: support setting hardware addresses from ethernet coreMatt Pelland
mvpp2 already has support for setting MAC addresses but this functionality was not exposed to the ethernet core. This commit exposes this functionality so that MAC address assignments stored in U-Boot's environment are correctly applied before Linux boots. Signed-off-by: Matt Pelland <mpelland@starry.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: add marvell MDIO driverAlex Marginean
This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well. This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45. This patch also adds device tree binding for marvell MDIO driver. Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers/fsl-mc: Create Kconfig file to manage driver specific configs betterFlorinel Iordache
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: driver for MDIO muxes controlled over I2CAlex Marginean
This driver is used for MDIO muxes driven over I2C. This is currently used on Freescale LS1028A QDS board, on which the physical MDIO MUX is controlled by an on-board FPGA which in turn is configured through I2C. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-04Revert "drivers: net: driver for MDIO muxes controlled over I2C"Joe Hershberger
This reverts commit d9a9174fa5687521035b2ec82cce86cdcf4f36e6.
2019-08-22drivers: net: mc: Report extra memory to LinuxMeenakshi Aggarwal
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved. But MC support to work with 128MB or 256MB DDR memory also, in this case, rest of the memory is not usable. So reporting this extra memory to Linux through dtb memory fixup. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-11Drop PCMCIASimon Glass
This is no-longer used in U-Boot and has not been converted to driver model. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Drop environment.h header file where not neededSimon Glass
This header file is now only used by files that access internal environment features. Drop it from various places where it is not needed. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_get() to env.hSimon Glass
Move env_get() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_set() to env.hSimon Glass
Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_set_hex() to env.hSimon Glass
Move env_set_hex() over to the new header file along with env_set_addr() which uses it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11env: Move env_get_f() to env.hSimon Glass
Move this function over to the new header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11env: Move get_env_id() to env.hSimon Glass
Move this function over to the new header file. Also rename it to have an env_ prefix like the other functions. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-09net: sh_eth: Fix 64bit build warningsMarek Vasut
Fix various type warnings when building this driver for 64bit machine. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09net: sh_eth: Add R8A77980 V3H gether supportMarek Vasut
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth driver, add them to support ethernet on R8A77980. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-07-29doc: arch: sandbox: Replace all the instances of README.sandboxKeerthy
commit 49116e6d236d ("doc: arch: Convert README.sandbox to reST") Moves README.sandbox to doc/arch. Replace all the existing instances to point to the right documentation file. Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-07-27Merge tag 'u-boot-imx-20190719' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20190719 - CCF for i.MX6 - nandbcb command to write SPL into NAND - Switch to DM (i.MX28) - Boards: Toradex, engicam, DH - Fixes for i.MX8 - Fixes for i.MX7ULP Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-25net: sun8i_emac: Test the correct phyEmmanuel Vadot
H3/H5 can either use the internal phy or an external one. Before getting clock and resets for the internal phy, test that we are using it because otherwise it break emac when using an external phy. Tested-on: OrangePi PC2 (H5) Fixes: 2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support) Signed-off-by: Emmanuel Vadot <manu@freebsd.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: davinci_emac: convert to using the driver modelBartosz Golaszewski
Now that we removed all legacy boards selecting TI_EMAC we can completely convert the driver code to using the driver model. This patch also updates all remaining users of davinci_emac. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2019-07-25net: macb: Fix check for little-endian system in gmac_configure_dma()Anup Patel
Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime whether underlying system is little-endian or big-endian. This way we are not dependent on any U-Boot specific OR compiler specific macro to check system endianness. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: Extend MACB driver for SiFive Unleashed boardAnup Patel
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select different TX clock for 1000mbps vs 10/100mbps. This patch adds SiFive MACB compatible string and extends the MACB ethernet driver to change TX clock using TX_CLK_SEL register for SiFive MACB. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: tsec: Change compatible strings to match LinuxVladimir Oltean
In the case of the tsec network driver, so far there has been no mainline user of DM_ETH where the DT bindings get used. In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string was made up for the documentation, but there is no mainline code that parses the "compatible" property anyway. In both cases, there are no DT blobs that contain the old strings. So change the documentation to "fsl,etsec2" for the Ethernet ports and "fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also uses, at least for LS1021A. More compatible strings can be added once other (PowerPC) SoCs are migrated to DM_ETH. The current ls1021a.dtsi doesn't match what was documented for the MDIO buses anyway (the "compatible" is "gianfar" currently). This will be fixed in the next patch. Fixes: 69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller") Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: tsec: Common handling of MAC station address for DM_ETHVladimir Oltean
In tsec_init, the MAC address is retrieved from 2 different structures depending on whether DM_ETH is enabled or not. But since the field name is the same inside both structures, we can conditionally define the structure of the correct type and simplify the assignments. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Make errors visibleVladimir Oltean
This replaces debug() calls with printf() so that it is immediately obvious from the console that something is wrong. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Reverse Christmas tree notationVladimir Oltean
This is a cosmetic patch that reorders variable definitions in the inverse order of their line length, where possible. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Fix offset of MDIO registers for DM_ETHVladimir Oltean
By convention, the eTSEC MDIO controller nodes are defined in DT at 0x2d24000 and 0x2d50000, but actually U-Boot does not touch the interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM, MDIO_EMAPM). That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM, MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at the 0x520 offset. So shift the DT-defined register map by the offset of MDIO_MIIMCFG when mapping the MDIO bus registers. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net: tsec: Refactor the readout of the tbi-handle propertyVladimir Oltean
The point of this patch is to eliminate the use of the locally-defined "reg" variable (which interferes with next patch) and simplify the fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is missing. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25net/macb: increase RX buffer size for GEMRamon Fried
Macb Ethernet controller requires a RX buffer of 128 bytes. It is highly sub-optimal for Gigabit-capable GEM that is able to use a bigger DMA buffer. Change this constant and associated macros with data stored in the private structure. RX DMA buffer size has to be multiple of 64 bytes as indicated in DMA Configuration Register specification. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-25net: macb: apply sane DMA configurationRamon Fried
DMA configuration was heavily dependent on the HW defaults, add function to properly set the required fields, including the new dma_burst_length. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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