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path: root/drivers/pinctrl/mscc
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2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-23pinctrl: mscc: Add gpio and pinctrl for Serval SoC family.Horatiu Vultur
The Serval SoC family has 32 pins. Currently there is no support for Serval in Linux kernel. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23pinctrl: mscc: Add gpio and pinctrl for Servalt SoC family.Horatiu Vultur
The Servalt SoC family has 36 pins. Currently there is not support for Servalt pinctrl in Linux kernel. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16pinctrl: mscc: Add gpio and pinctrl for Jaguar2 SOC familyHoratiu Vultur
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common to support new numbe of pins and remove any platform dependency from mscc-common. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2018-12-19pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based)Gregory CLEMENT
This driver supports the pin and gpio controller found in the Ocelot and Luton SoCs. The driver was inspired from the pinctrl driver in Linux, but was simplified and was modified to allow supporting an other SoCs (Luton). For Ocelot and Luton the controller is the same, only the pins to program differ. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>