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path: root/drivers/pinctrl/pinctrl_stm32.c
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2017-07-10pinctrl: stm32: add set_state opsChristophe Kerello
set_state_ops is kept under PINCTRL_FULL flag in order to decrease memory footprint in some configuration. PINCTRL_FULL can be enabled for debug purpose. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-07-10pinctrl: stm32: handle a configuration listChristophe Kerello
This patch handles a configuration list behind pinctrl-0 like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>; Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-06-01dm: core: Replace of_offset with accessor (part 2)Simon Glass
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-08stm32f7: increase the max no of pin configuration to 70Vikas Manocha
The number of pins to be configured could be more than 50 e.g. in case of sdram controller, there are about 56 pins (32 data lines, 12 address & some control signals). Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use stm32f7 gpio driver supporting driver modelVikas Manocha
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08dm: gpio: Add driver for stm32f7 gpio controllerVikas Manocha
This patch adds gpio driver supporting driver model for stm32f7 gpio. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Christophe KERELLO <christophe.kerello@st.com> [trini: Add depends on STM32] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-17PINCTRL: stm32f7: add pin control driverVikas Manocha
This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and output mode configuration which was missing. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>