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path: root/drivers/pinctrl/pinctrl_stm32.c
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2019-08-27pinctrl: pinctrl_stm32: cosmetic: Reorder include filesPatrice Chotard
Reorder include files Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12pinctrl: stm32: update .bind callbackPatrice Chotard
Update .bind callback in order to bind all pinctrl subnodes with "gpio-controller" property to gpio_stm32 driver. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12pinctrl: pinctrl_stm32: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (*idx < 0) ^ drivers/pinctrl/pinctrl_stm32.c: At top level: warning: no previous prototype for 'stm32_pinctrl_probe' [-Wmissing-prototypes] int stm32_pinctrl_probe(struct udevice *dev) ^~~~~~~~~~~~~~~~~~~ Signed-off-by: Patrice CHOTARD <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-23pinctrl: stm32: Add st,stm32f769-pinctrl compatible stringPatrice Chotard
Due to DT kernel synchronisation, add new pinctrl compatible string for stm32f769. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()Patrice Chotard
Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must be updated. stm32_pinctrl_get_gpio_dev() returns from a given pin selectors the corresponding bank gpio device and the gpio_offset inside this gpio bank. Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07pinctrl: stm32: Move gpio_dev list filling outside probe()Patrice Chotard
Move gpio_dev list filling outside probe() to speed-up U-boot boot sequence execution. This list is populated only when needed. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06pinctrl: stm32: make pinctrl use hwspinlockBenjamin Gaignard
Protect configuration registers with a hardware spinlock. If a hwspinlock is defined in the device-tree node used it to be sure that none of the others processors on the SoC could change the configuration at the same time. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-16pinctrl: stm32: Add get_pin_muxing() opsPatrice Chotard
Add get_pin_muxing() ops to obtain the pin muxing description a given pin index. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16pinctrl: stm32: Add get_pin_name() opsPatrice Chotard
Add get_pin_name ops to obtain a pin name given a pin index of a specified pin-controller. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16pinctrl: stm32: Add get_pins_count() opsPatrice Chotard
Add get_pins_count ops to obtain the number of pins owns by a pin-controller. On STM32 SoCs bindings, each pin-controller owns several gpio banks. Each GPIO bank can own up to 16 pins. To obtain the total pins count, walk through each sub-nodes (ie GPIO banks) and sum each GPIO banks pins number. For that in probe() we build a list with each GPIO device reference found. This list will also be used with future get_pin_muxing and get_pin_name ops to speed up and optimize walk through all GPIO banks. As this code is common to all STM32 SoCs, this code is put under SPL_BUILD compilation flag to avoid to increase SPL code size for STM32F7 which is limited to 32Ko. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-19pinctrl: stm32: update pincontrol for stmp32mp157Patrick Delaunay
- add the 2 new compatible used by STM32MP157 "st,stm32mp157-pinctrl" "st,stm32mp157-z-pinctrl" - update the mask for the port Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-01-10pinctrl: stm32: add stm32f4 pinctrl compatible stringsPatrice Chotard
STM32F4 SoCs uses the same pinctrl block as found into STM32F7 and H7 SoCs. We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl" compatible string into pinctrl_stm32.c. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada
U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // <smpl> @@@@ -error +pr_err (...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-22pinctrl: stm32: add stm32h743-pinctrl compatiblePatrice Chotard
STM32H7 SoCs uses the same pinctrl block as found into STM32F7 SoCs Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-07-10pinctrl: stm32: add set_state opsChristophe Kerello
set_state_ops is kept under PINCTRL_FULL flag in order to decrease memory footprint in some configuration. PINCTRL_FULL can be enabled for debug purpose. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-07-10pinctrl: stm32: handle a configuration listChristophe Kerello
This patch handles a configuration list behind pinctrl-0 like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>; Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-06-01dm: core: Replace of_offset with accessor (part 2)Simon Glass
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-08stm32f7: increase the max no of pin configuration to 70Vikas Manocha
The number of pins to be configured could be more than 50 e.g. in case of sdram controller, there are about 56 pins (32 data lines, 12 address & some control signals). Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use stm32f7 gpio driver supporting driver modelVikas Manocha
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08dm: gpio: Add driver for stm32f7 gpio controllerVikas Manocha
This patch adds gpio driver supporting driver model for stm32f7 gpio. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Christophe KERELLO <christophe.kerello@st.com> [trini: Add depends on STM32] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-17PINCTRL: stm32f7: add pin control driverVikas Manocha
This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and output mode configuration which was missing. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>