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path: root/drivers/pinctrl/rockchip
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2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-28rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3188.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3036.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: add support for I2C[123467]Philipp Tomsich
This adds support for the (to date unsupported) I2C controllers 1~4 and 6~7 (i.e. now all controllers except I2C5, which is not accessible on the RK3399-Q7, are supported by pinctrl). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: Add rk322x gmac pinctrl supportDavid Wu
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength, clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: Add rk3328 gmac pinctrl supportDavid Wu
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2 and bit10 at com iomux register. After that, set rgmii m1 tx pins to 12ma drive-strength, and clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk3328.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driverDavid Wu
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h, and move them into pinctrl-driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add pinctrl driverKever Yang
Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: pinctrl: rk3399: add support for I2C8Philipp Tomsich
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the peripheral-ids is extended to ensure that pinctrl requests are passed through to the function configuring the I2C pins. For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using communication with the FAN53555 connected on I2C8. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-10-01rockchip: pinctrl: rk3368: add pinctrl for SDMMC0Philipp Tomsich
Apparently, our earlier assumption that the BROM will always set up the iomux for SDcard communication does not always hold true: when booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard pins are not set up and need to be configured by the pinctrl driver to allow SD card access. This change implements support for setting up the SDMMC pins in pinctrl for the RK3368. Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: pinctrl: rk3368: Convert to livetreePhilipp Tomsich
Update the pinctrl driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-18rockchip: rk322x: pinctrl: fix IO MASK error on sdcard pinKever Yang
Fix the IOMUX setting for SDcard CMD pin at the same time. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-18rockchip: rk322x: pinctrl: using compatible name same with dtsKever Yang
The dts from kernel is using rk3228-pinctrl as compatible name, need to sync with it to make the driver work. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: pinctrl: rk3368: add SPI supportPhilipp Tomsich
To implement pinctrl support for the RK3368, we need to add the bit-definitions to configure the IOMUX and tie these into the pinctrl framework. This also adds the mapping from the IRQ# back onto the periheral id for the SPI devices. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: move IOMUX bit-definitions to pinctrl driverPhilipp Tomsich
There is no real reason to keep the bit-definitions for the IOMUX in the grf header file (which defines the register layout of the GRF block): these should only be used by our pinctrl driver (with the possible exception of early debug-init code in TPL/SPL). This moves the relevant definitions from the grf_rk3368.h header into the pinctrl driver pinctrl_rk3368.c. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: add support for configuring the MMC pinsPhilipp Tomsich
The RK3368 has two SD/MMC controllers that can be used from U-Boot both during SPL and for booting an OS from the full bootloader stage. While both are configured to (mostly) sensible settings from the BROM, additional configuration for the MMC controller is needed to configure it to 8bit mode. This adds pinctrl support for the MMC controller. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: add GMAC (RGMII only) supportPhilipp Tomsich
To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this point), we need support for additional pin-configuration. This commit adds the pinctrl support for GMAC in RGMII mode: * adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID * configures the RGMII pins Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: grf: use shifted-constantsPhilipp Tomsich
The RK3368 GRF header was still defines with a shifted-mask but with non-shifted function selectors for the IOMUX defines. As the RK3368 support is still fresh enough to allow a quick change, we do this now before having more code use this. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Add support for drive-strength in PINCTRLRomain Perier
Currently, drive-strenght to 12ma are described and supposed to be used on RK3288. However, the pinctrl driver for this SoC only handles muxing and pull up/pull down via PU/PD control registers. So complex IPs like GMAC are working in normal ethernet 100mbps, but not at 1gbps typically. This commit adds support for handling drive-strength of 12ma, when it's defined in the DT. Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Revert MAC_TXCLK in pinctrl for GMACRomain Perier
This reverts TXCLK toggling that was accidently dropped while reworking commit 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the gmac ethernet interface"). So the TX clock is enabled and we can use GMAC_ROCKCHIP in 1Gbps when basic PINCTRL support is enabled (!PINTRL_FULL). Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Remove phy reset GPIO pull upRomain Perier
We should not handle this pin explicitly from pinctrl. GMAC driver takes care of it by using a "reset-gpio" in the DT. This commit removes pull up for GPIO4B0. Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3288: Add pinctrl support for the gmac ethernet interfaceSjoerd Simons
Add support for the gmac ethernet interface to pinctrl. This hardcodes the setup to match that of the firefly and Radxa Rock2 boards, using the RGMII phy mode for gmac interface and GPIO4B0 as the phy reset GPIO. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: pinctrl: rk3328: use gpio instead of sdmmc-pwrenKever Yang
SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may be high active or low active, the dwmmc driver always assume the sdmmc-pwren as high active. Kernel treat this pin as fixed regulator instead of a pin from controller, and then it can set in dts file upon board schematic, that's a good solution, we can also do this in u-boot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add pinctrl driverKever Yang
Add init pinctrl driver support for: - i2c; - spi; - uart; - pwm; - emmc/sdmmc; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: pinctrl: dm: convert fdt_get to dev_readPhilipp Tomsich
With the new dev_read functions available, we can convert the rockchip architecture-specific drivers and common drivers used by these devices over to the dev_read family of calls. This change covers the pinctrl drivers for the Rockchip devices. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: Add rv1108 pinctrl driverAndy Yan
Add pinctrl support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: rk3328: do not set io routingKever Yang
In rk3328, some function pin may have more than one choice, and muxed with more than one IO, for example, the UART2 controller IO, TX and RX, have 3 choice(setting in com_iomux): - M0 which mux with GPIO1A0/GPIO1A1 - M1 which mux with GPIO2A0/GPIO2A1 - usb2phy which mux with USB2.0 DP/DM pin. We should not decide which group to use in pinctrl driver, for it may be different in different board, it should goes to board file, and the pinctrl file should setting correct iomux depends on the com_iomux value. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: move rk3328 grf reg definition in header fileKever Yang
Move GRF register bit definition into GRF header file, remove 'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3036: clean mask definition for grf regKever Yang
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro definition in grf header file and pinctrl driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3368: Add pinctrl driverAndy Yan
Add driver to support iomux setup for the most commonly used peripherals on rk3368. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: core: Replace of_offset with accessor (part 2)Simon Glass
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: pinctrl: rk3399: add support for the HDMI I2C pinsPhilipp Tomsich
To add HDMI support for the RK3399, this commit provides the needed pinctrl functionality to configure the HDMI I2C pins (used for reading the screen's EDID). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: pinctrl: rk3399: add gmac io strength supportKever Yang
GMAC controller need to init the tx io driver strength to 13mA, just like the description in dts pinctrl node, or else the controller may only work in 100MHz Mode, and fail to work at 1000MHz mode. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com <mailto:philipp.tomsich@theobroma-systems.com>> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: pinctrl: rk3399: add support for the SPI5 controllerPhilipp Tomsich
This commit adds support for the pin-configuration of the SPI5 controller of the RK3399 through the following changes: * grf_rk3399.h: adds definition for configuring the SPI5 pins in the GPIO2C group * periph.h: defines PERIPH_ID_SPI3 through PERIPH_ID_SPI5 * pinctrl_rk3399.c: adds the reverse-mapping from the IRQ# to PERIPH_ID_SPI5; dispatches PERIPH_ID_SPI3 through SPI5 to the appropriate pin-config function; implements the pin-configuration for PERIPH_ID_SPI5 using the GPIO2C group X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-27pinctrl: Kconfig: sort pinctrl config options to prevent future clutterPhilipp Tomsich
This originally started out as "pinctrl: Kconfig: reorder to keep Rockchip options together" and tried to keep the Rockchip-related config options together. However, we now rewrite all chip-specific driver selections to start with CONFIG_PINCTRL_ (with the inadvertent changes to related Makefiles) and sort those alphabetically. And as this already means touching most of the file, we also reformat the help text to not exceed 80 characters (but make full use of those 80 characters). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04rockchip: pinctrl: rk3399: add GMAC (RGMII only) supportPhilipp Tomsich
To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this point), we need support for additional pin-configuration. This commit adds the pinctrl support for GMAC in RGMII signalling mode: * adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID * adds the required defines (in the GRF support) for configuring the GPIOC pins for RGMII * configures the RGMII pins (in GPIOC) when requested via pinctrl X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3328: add pinctrl driverKever Yang
Add rk3328 pinctrl driver and grf/iomux structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3188: Add pinctrl driverHeiko Stübner
Add a driver which supports pin multiplexing setup for the most commonly used peripherals. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: pinctrl: rk3399: add the of-platdata supportKever Yang
Do not use the API which of-platdata not support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: arm64: rk3399: move grf register definitions to grf_rk3399.hKever Yang
rk3399 grf register bit defenitions should locate in header file, so that not only pinctrl can use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08dm: core: Replace of_offset with accessorSimon Glass
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-22pinctrl: add driver for rk3399Kever Yang
This patch add pinctrl driver for rk3399. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31rockchip: rk3288: Fix pinctrl for GPIO bank 0John Keeping
Bank 0 is the "PMU GPIO" bank which is controlled by the PMU registers rather than the GRF registers. In the GRF the top half of the register is used as a mask so that some bits can be updated without affecting the others, but in the PMU this feature is not provided and the top half of the register is reserved. Take the same approach as the Linux driver to update the value via read-modify-write but setting the mask for only the bits that have changed. The PMU registers ignore the top 16 bits so this works for both GRF and PMU iomux registers. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-07-27dm: Use dm_scan_fdt_dev() directly where possibleSimon Glass
Quite a few places have a bind() method which just calls dm_scan_fdt_dev(). We may as well call dm_scan_fdt_dev() directly. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()Simon Glass
This new function is more convenient for callers, and handles pre-relocation situations automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-25cosmetic: rockchip: sort socs according to numbersHeiko Stübner
Having some sort of ordering proofed helpful in a lot of other places already. So for a larger number of rockchip socs it might be helpful as well instead of an ever increasing unsorted list. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25cosmetic: rockchip: rk3036: pinctrl: fix config symbol namingHeiko Stübner
Rockchip socs are always named rkxxxx in all places, as also shown by the naming of the rk3036 pinctrl file itself. Therefore also name the config symbol according to this scheme. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
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