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path: root/drivers/pinctrl
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2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/bug.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10pinctrl: nxp: scu: Check the pad partition before set pinmuxYe Li
If a pad is not owned by current partition we should not set its pinmux. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-04-23dm: pinctrl: Use right device pointer for configuring pinctrlLokesh Vutla
commit 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree") converted pinctrl driver to livetree. In this conversion, the call to read pinctrl-single,pins/bits property is provided with pinctrl device pointer instead of pinctrl config pointer. Because of this none of the pins gets configured. Fix it by passing the right udevice pointer. Fixes: 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree") Reported-by: Tom Rini <trini@konsulko.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-04-16test: dm: update test for pins configuration in pinctrl nodePatrick Delaunay
Add test for "pins" configuration in gpio uclass with set_state() ops and test for generic parsing of pinconf_param array). set_state() is called by: - pinctrl_generic_set_state |- pinctrl_generic_set_state_subnode Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16pinctrl: sandbox: Add mux information in get_pin_muxingPatrick Delaunay
Add param information in pin information output. This update prepare unitary test for pin configuration in pinctrl node. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: pinctrl: migrate pinctrl-generic to livetreePatrick Delaunay
Migrate pinctrl-generic to livetree: - dev_for_each_property - dev_read_prop_by_prop - dev_read_string_count - dev_read_string_index and get rid of DECLARE_GLOBAL_DATA_PTR. This patch solves the parsing issue during sandbox tests for pin configuration (OF_LIVE is activated in sandbox_defconfig and sub node are not correctly parsed in pinctrl_generic_set_state_subnode with fdt lib API). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16dm: pinctrl: convert pinctrl-single to livetreePatrick Delaunay
Convert 'pinctrl-single' using livetree functions - dev_read_prop - dev_read_u32_default - dev_read_u32_array - dev_read_bool - dev_read_addr and get rid of DECLARE_GLOBAL_DATA_PTR. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-02-13pinctrl: stmfx: update the result type of dm_i2c_reg_readPatrick Delaunay
Use int as result of dm_i2c_reg_read to avoid warning with W=1 (warning: comparison is always false due to limited range of data type [-Wtype-limits]) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-11Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini
sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
2020-02-07x86: Give each driver an IRQ typeSimon Glass
Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-04x86: Move itss.h from Apollo Lake to the generic x86 include directoryWolfgang Wallner
The code in this file is not specific to Apollo Lake. According to coreboot sources (where this code comes from), it is common to at least: * Apollo Lake * Cannon Lake * Ice Lake * Skylake Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-01-16pinctrl: mediatek: add support for different pinctrlSam Shih
Due to the pinctrl hardware of MT7622 is difference from others SoC which using the common part of mediatek pinctrl. So we need to modify the common part of mediatek pinctrl. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT7622Sam Shih
This patch add Pinctrl driver for MediaTek MT7622 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT8512mingming lee
Add Pinctrl driver for MediaTek MT8512 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-14pinctrl: add i.MXRT driverGiulio Benetti
Add i.MXRT pinctrl driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-08Merge tag 'u-boot-imx-20200108' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx --------------------------------------------------------------------- Add i.MX8MP SoC and EVK board Update README for i.MX8MN EVK and fix mmc env Add pca9450 driver -------------------------------------------------------------------- Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
2020-01-08pinctrl: imx8m: support i.MX8MPPeng Fan
Add i.MX8MP compatible to let the pinctrl driver could support i.MX8MP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-15x86: apl: Add pinctrl driverSimon Glass
Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: Add a generic Intel pinctrl driverSimon Glass
Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15dm: pinctrl: Allow enabling full pinctrl in SPL/TPLSimon Glass
At present these options cannot be enabled for SPL/TPL, but this can be useful in some cases. Add Kconfig options to allow it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-06pinctrl: rockchip: Add pinctrl support for rk3308David Wu
An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calculate offset. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-03pinctrl: add driver for MT8518mingming lee
Add Pinctrl driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-11-24drivers: bcm283x: Set pre-location flag for OF_BOARDMatthias Brugger
U-Boot support on Raspberry Pi 4 relies on the device-tree provided by the firmware. The blob does not contain the U-Boot specific pre-loc-rel properties. The result is, that the U-Boot banner is not printed. We fix this by setting the DM_FLAG_PRE_RELOC flag in the driver, if we rely on a device-tree provided by the firmware. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24pinctrl: bcm283x: Add compatible for RPi4Matthias Brugger
The Raspberry Pi 4 upstream kernel device tree instroduces a new compatible for the pinctroller. Add this to the driver so that we can boot with the upstream kernel DT. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-17Merge tag 'u-boot-rockchip-20191118' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip SoC: PX30, RK3308 - Add and migrate to use common dram driver: PX30, RK3328, RK3399 - Add rk3399 board Tinker-s support - Board config update for Rock960, Rockpro64
2019-11-17pinctrl: rockchip: add px30 pinctrl driverDavid Wu
Add the necessary glue code to allow pinctrl setting on px30 socs. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-14pinctrol: dm: remove the function pinctrl_decode_pin_configPatrick Delaunay
Remove the pinctrl_decode_pin_config() API, because this function is unused and not compatible with livetree (it uses fdtdec_get_bool instead of ofnode API). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-11-05pinctrl: imx8m: support i.MX8MNPeng Fan
Support i.MX8MN in imx8m pinctrl driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-25pinctrl: add support for MediaTek MT7628Weijie Gao
This patch adds pinctrl support for mt7628, with a file for common pinmux functions and a file for mt7628 which has additional support for pinconf. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-21dm: pinctrl: fix for introduce PINCONF_RECURSIVE optionPatrick Delaunay
Correct the name of the define used CONFIG_IS_ENABLED which is not aligned with Kconfig name: CONFIG_$(SPL_)PINCONF_RECURSIVE. The recursive calls is conditional only for UCLASS_PINCONFIG "pinconfig" driver. It is always needed to call pinctrl_post_bind for UCLASS_PINCTRL "pinctrl", the test CONFIG_IS_ENABLED(PINCONF_RECURSIVE) need to be removed for this driver. This correct a regression introduced because the same patch is applied twice times in u-boot-dm branch: - commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") - commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-10-21pinctrl: Kconfig: remove duplicated nodesPatrick Delaunay
Remove the duplicated configs introduced when the same patch is applied twice times: - commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") - commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-10-15dm: pinctrl: introduce PINCONF_RECURSIVE optionPatrick Delaunay
In the Linux pinctrl binding, the pin configuration nodes don't need to be direct children of the pin controller device (may be grandchildren for example). This behavior is managed with the pinconfig u-class which recursively bind all the sub-node of the pin controller. But for some binding (when pin configuration is only children of pin controller) that is not necessary. U-Boot can save memory and reduce the number of pinconf instance when this feature is deactivated (for arch stm32mp for example for SPL). This patch allows to control this feature with a new option CONFIG_PINCONF_RECURSIVE when it is possible for each individual pin controller device. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Fixed CONFIG_IF_ENABLED() condition, added __maybe_unused: Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-15dm: pinctrl: Skip not associated gpio phandle and rise a warning messageMichael Trimarchi
Skip not associated gpio phandle let register the other gpios on a group. We need anyway to send out a warning to the user to fix their uboot-board.dtsi. Thhe handle id can be found inside the decompiled dtb dtc -I dtb -O dts -o devicetree.dts spl/u-boot-spl.dtb Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15dm: pinctrl: introduce PINCONF_RECURSIVE optionPatrick Delaunay
In the Linux pinctrl binding, the pin configuration nodes don't need to be direct children of the pin controller device (may be grandchildren for example). This behavior is managed with the pinconfig u-class which recursively bind all the sub-node of the pin controller. But for some binding (when pin configuration is only children of pin controller) that is not necessary. U-Boot can save memory and reduce the number of pinconf instance when this feature is deactivated (for arch stm32mp for example for SPL). This patch allows to control this feature with a new option CONFIG_PINCONF_RECURSIVE when it is possible for each individual pin controller device. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-08pinctrl: nxp: DM_FLAG_PRE_RELOC by defaultIgor Opaniuk
For NXP SoCs we have to set pinmux configuration ASAP (ideally before relocation) to get serial console working. Without this we miss almost the half of output (U-boot version, CPU defails, Reset cause, DRAM details etc.). To achieve this we need to force appropriate pinctrl drivers to get probed before relocation. Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-10-08pinctrl: imx: use devfdt_get_addr_size_indexPeng Fan
fdtdec_get_addr_size could not parse addr/size correctly is using address-cells 2 and size-cells 2 on an ARM32 SoC. So switch to use devfdt_get_addr_size_index. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-09-05clk: aspeed: Add support for SD clockEddie James
Add code to enable the SD clock on the ast2500 SoC. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-08-27pinctrl: stmfx: update pinconf settingsPatrick Delaunay
Alignment with kernel driver. According to the following tab (coming from STMFX datasheet), updates have to done in stmfx_pinctrl_conf_set function: -"type" has to be set when "bias" is configured as "pull-up or pull-down" -PIN_CONFIG_DRIVE_PUSH_PULL should only be used when gpio is configured as output. There is so no need to check direction. DIR | TYPE | PUPD | MFX GPIO configuration ----|------|------|--------------------------------------------------- 1 | 1 | 1 | OUTPUT open drain with internal pull-up resistor ----|------|------|--------------------------------------------------- 1 | 1 | 0 | OUTPUT open drain with internal pull-down resistor ----|------|------|--------------------------------------------------- 1 | 0 | 0/1 | OUTPUT push pull no pull ----|------|------|--------------------------------------------------- 0 | 1 | 1 | INPUT with internal pull-up resistor ----|------|------|--------------------------------------------------- 0 | 1 | 0 | INPUT with internal pull-down resistor ----|------|------|--------------------------------------------------- 0 | 0 | 1 | INPUT floating ----|------|------|--------------------------------------------------- 0 | 0 | 0 | analog (GPIO not used, default setting) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27pinctrl: pinctrl_stm32: cosmetic: Reorder include filesPatrice Chotard
Reorder include files Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-09pinctrl: renesas: Add R8A77980 V3H PFC tablesMarek Vasut
Import R8A77980 V3H PFC tables from Linux 5.2.7 , commit 5697a9d3d55f. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-07-30Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2019-07-29pinctrl: mediatek: fix warningFabien Parent
Fix the following warning when CONFIG_PINCONF=n: drivers/pinctrl/mediatek/pinctrl-mtk-common.c:35:36: warning: ‘mtk_drive’ defined but not used [-Wunused-const-variable=] static const struct mtk_drive_desc mtk_drive[] = { ^~~~~~~~~ Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-07-29pinctrl: renesas: fix R-Car gpio0_00 operation fails with 'gpio -input' commandtitron
Fix GPIO bank 0 pin 0 request/release off by one error. Without this patch, it is not possible to request/release GPIO bank 0 pin 0. Signed-off-by: Tiezhuang Dong <tiezhuang.dong.yh@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-07-23pinctrl: renesas: Synchronize Gen2/Gen3 tables with Linux 5.2Eugeniu Rosca
In spite of the summary line, U-Boot commits [1-2] seem to have aligned the U-Boot PFC tables to Linux v5.1 rather than to v5.0, since they also imported the Linux 5.1 commits listed in [3]. What current commit tries to accomplish is to align the Gen2 and Gen3 pinctrl tables to Linux v5.2. Importing these updates in two steps as done before (i.e. separately for Gen2 and Gen3) is somewhat difficult due to Linux commits like [5-6] which atomically update both Gen2/3 platforms and whose breakdown would not be easily possible. The detailed list of Linux commits squashed into this U-Boot patch is shown in [4]. The second column in [4] depicts the patch id mismatch between the original Linux and the resulted U-Boot commit. The exclamation mark means that manual conflict resolution was involved during cherry picking Linux commit into U-Boot repository (this is mainly caused by dropped changes in files like pfc-r8a7795-es1.c and pfc-r8a77980.c which are missing in U-Boot). This patch has been applied on top of v2019.07-rc4-155-g8754656680b6 and boot-tested on: - H3-ES2.0-Salvator-X - M3-ES1.1-Salvator-XS - M3N-ES1.1-ULCB [1] 8719ca81136474 ("pinctrl: renesas: Synchronize Gen3 tables with Linux 5.0") [2] a6a743df242a50 ("pinctrl: renesas: Synchronize Gen2 tables with Linux 5.0") [3] Linux 5.1 commits already contained in [1-2]: 79dbbdbeccc6784 pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions 729257d674bc2e6 pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions b9fd50488b4939c pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group a4b0350047f1b10 pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group fdbbd6b74c9278f pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions 16978e7d40f73be pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions 86c045c2e4201e9 pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3 b8ba194ca5f4ca2 pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups 81c585c96b7dd47 pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitions 08b7e2112a9b19c pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions 99fdb920f5534d1 pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions 85ccae133bde425 Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins" f7d8b568e204d29 pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability 5219aa33caec2f7 pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering 3e3eebeacad79bd pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering 7219a4b64520873 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 699c7d1346fbef6 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 [4] Linux 5.2 commits backported and squashed into this U-Boot patch Linux commit id Linux commit summary line 9925e8795726801 pinctrl: sh-pfc: Validate pins/marks in pin groups at build time f83f97684a737f6 pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length 5e8588c86d71e78 pinctrl: sh-pfc: Validate fixed-size field widths at build time 1c5c1101755c5ed pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers 3df892fdbfe6919 pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers dcd24e098d8df8b pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions 2cee6cb290ab30f pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions d92ee9cf8ec8d7f ! pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume efca8da0c5fcc7f ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro 69f7be1c6314fb0 ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro 19b593a1cf068ef ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro c481c8178420b8c pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields fa4d36712f20e24 ! pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields 360328c7dc15f48 pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation 943ff71281c6ce4 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N e167d723e1a472d pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D e87882eb9be10b2 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2 5671f8e0270ad5e ! pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions 662dc924a05e9df ! pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin 624a7a12cc0cc77 ! pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions a040f3dec8eb7b1 pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A,B,C} to SEL_ADG{A,B,C} e551122cdb7fcb9 pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF baaa2effc684e49 pinctrl: sh-pfc: r8a77970: Fix spacing f05603fa6aa3043 pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data 0a042b355e60269 pinctrl: sh-pfc: r8a77965: Add I2C{0,3,5} pins, groups and functions [5] efca8da0c5fcc7 ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro") [6] 69f7be1c6314fb ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
generated by cgit (git 2.34.1) at 2024-12-29 17:47:52 +0000