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path: root/drivers/pinctrl
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2018-01-28Merge git://git.denx.de/u-boot-rockchipTom Rini
2018-01-28bcm2835_pinctrl: Probe pre-relocAlexander Graf
The serial drivers now depend on the pinctrl driver to determine whether they are enabled. That means if a serial device wants to be used pre-reloc, we also need the pinctrl device pre-reloc. Adapt the pinctrl driver as well as dts overlay accordingly. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28bcm283x: Add pinctrl driverAlexander Graf
The bcm283x family of SoCs have a GPIO controller that also acts as pinctrl controller. This patch introduces a new pinctrl driver that can actually properly mux devices into their device tree defined pin states and is now the primary owner of the gpio device. The previous GPIO driver gets moved into a subdevice of the pinctrl driver, bound to the same OF node. That way whenever a device asks for pinctrl support, it gets it automatically from the pinctrl driver and GPIO support is still available in the normal command line phase. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28rockchip: pinctrl: Add rk322x gmac pinctrl supportDavid Wu
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength, clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: Add rk3328 gmac pinctrl supportDavid Wu
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2 and bit10 at com iomux register. After that, set rgmii m1 tx pins to 12ma drive-strength, and clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk3328.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driverDavid Wu
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h, and move them into pinctrl-driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-24pinctrl: rmobile: Import R8A7794 E2 PFC tablesMarek Vasut
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7792 V2H PFC tablesMarek Vasut
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tablesMarek Vasut
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7790 H2 PFC tablesMarek Vasut
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-10Merge git://git.denx.de/u-boot-marvellTom Rini
2018-01-10pinctrl: stm32: add stm32f4 pinctrl compatible stringsPatrice Chotard
STM32F4 SoCs uses the same pinctrl block as found into STM32F7 and H7 SoCs. We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl" compatible string into pinctrl_stm32.c. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-09pinctrl: mvebu: Make drivers depend on the pinctrl frameworkMiquel Raynal
Armada pinctrl drivers shall not be compiled without the entire pinctrl framework and thus lack a "depends on" condition, otherwise the driver will simply not be probed. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-12-09pinctrl: rmobile: Add R8A77995 D3 PFC tablesMarek Vasut
Add PFC tables for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09pinctrl: rmobile: Add R8A77970 V3M PFC tablesMarek Vasut
Add PFC tables for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30rockchip: rk3128: add pinctrl driverKever Yang
Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30pfc: rmobile: Add hook to configure pin as GPIOMarek Vasut
Add hook into the PFC driver to allow the GPIO driver to toggle GPSR registers into GPIO mode when GPIO is requested. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30pinctrl: rmobile: Add support for setting single pinsMarek Vasut
Add code to handle single pins nodes from DT in addition to already support groups handling. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-27Merge git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27pinctrl: imx6ul: Fix pinctrl data overlapped with DT areaJagan Teki
before relocation pinctrl data BSS is overlapping DT area, when .data is using uninitialized global variable, imx6_pinctrl_soc_info. So assign them flags ZERO_OFFSET_VALID to prevent BSS overlap Suggested-by: Lokesh Vutla <lokeshvutla@ti.com> Reported-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-26rockchip: pinctrl: rk3399: add support for I2C8Philipp Tomsich
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the peripheral-ids is extended to ensure that pinctrl requests are passed through to the function configuring the I2C pins. For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using communication with the FAN53555 connected on I2C8. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-11-17pinctrl: meson: Add GXL SupportNeil Armstrong
Add the Amlogic Meson GXL pinctrl support based on the GXBB driver and the synchronized DTS from Linux 4.13.5 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
2017-11-06sti: fix STMicroelectronics copyrightPatrice Chotard
Uniformize all STMicroelectronics copyrights headers for STi related code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-10-15pinctrl: uniphier: simplify input enable and delete pin arraysMasahiro Yamada
The pin data are implemented for old SoCs to specify the bit shift of the IECTRL register. They are not wortwhile given the required memory footprint. Delete all the pin data and enable all bits of the IECTRL register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15pinctrl: uniphier: set PUPD_SIMPLE cap flag for PXs3Masahiro Yamada
Like other recenct UniPhier SoCs, the pupdctrl number of PXs3 matches to the pin number. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-10Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada
U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // <smpl> @@@@ -error +pr_err (...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04pinctrl: rmobile: Add pinconf to Renesas RCar pincontrol driverMarek Vasut
Add pinconf support to the PFC driver, so that it can handle DT props bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-10-01rockchip: pinctrl: rk3368: add pinctrl for SDMMC0Philipp Tomsich
Apparently, our earlier assumption that the BROM will always set up the iomux for SDcard communication does not always hold true: when booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard pins are not set up and need to be configured by the pinctrl driver to allow SD card access. This change implements support for setting up the SDMMC pins in pinctrl for the RK3368. Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-28pinctrl: rmobile: Add Renesas RCar pincontrol driverMarek Vasut
Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796 SoCs. This driver uses the PFC pin tables from Linux, thus letting us share the occassional fixes to those tables. This driver also has a DT support, so the pinmux is configured from DT instead of the ad-hoc setup in board file. This driver is meant to replace the pinmux part of SH_GPIO_PFC driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-09-22pinctrl: stm32: add stm32h743-pinctrl compatiblePatrice Chotard
STM32H7 SoCs uses the same pinctrl block as found into STM32F7 SoCs Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-09-18rockchip: pinctrl: rk3368: Convert to livetreePhilipp Tomsich
Update the pinctrl driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-14ARM: at91: Remove hardware.h included in configsWenyou Yang
As said in READRE.kconfig, include/configs/*.h will be removed after all options are switched to Kconfig. As the first step, remove the follow line from include/configs/*.h. #include <asm/hardware.h> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-08-23pinctrl: imx7ulp: Add new info instance for iomuxc1Peng Fan
To i.MX7ULP, we need to create two info instances for iomux0 and iomux1 respectively, otherwise iomuxc0/1 will share one info instance and use one base, because imx_pinctrl_probe will use info to store base address and etc. But iomuxc0/1 actually have different base address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
2017-08-23pinctrl: imx: Fix mask when SHARE_MUX_CONF_REG is setPeng Fan
when using SHARE_MUX_CONF_REG, wrong mask is used for writing config value, which causes mux value is cleared. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
2017-08-20ARM: uniphier: remove sLD3 SoC supportMasahiro Yamada
This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-18rockchip: rk322x: pinctrl: fix IO MASK error on sdcard pinKever Yang
Fix the IOMUX setting for SDcard CMD pin at the same time. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-18rockchip: rk322x: pinctrl: using compatible name same with dtsKever Yang
The dts from kernel is using rk3228-pinctrl as compatible name, need to sync with it to make the driver work. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: pinctrl: rk3368: add SPI supportPhilipp Tomsich
To implement pinctrl support for the RK3368, we need to add the bit-definitions to configure the IOMUX and tie these into the pinctrl framework. This also adds the mapping from the IRQ# back onto the periheral id for the SPI devices. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: move IOMUX bit-definitions to pinctrl driverPhilipp Tomsich
There is no real reason to keep the bit-definitions for the IOMUX in the grf header file (which defines the register layout of the GRF block): these should only be used by our pinctrl driver (with the possible exception of early debug-init code in TPL/SPL). This moves the relevant definitions from the grf_rk3368.h header into the pinctrl driver pinctrl_rk3368.c. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: add support for configuring the MMC pinsPhilipp Tomsich
The RK3368 has two SD/MMC controllers that can be used from U-Boot both during SPL and for booting an OS from the full bootloader stage. While both are configured to (mostly) sensible settings from the BROM, additional configuration for the MMC controller is needed to configure it to 8bit mode. This adds pinctrl support for the MMC controller. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: pinctrl: rk3368: add GMAC (RGMII only) supportPhilipp Tomsich
To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this point), we need support for additional pin-configuration. This commit adds the pinctrl support for GMAC in RGMII mode: * adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID * configures the RGMII pins Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: grf: use shifted-constantsPhilipp Tomsich
The RK3368 GRF header was still defines with a shifted-mask but with non-shifted function selectors for the IOMUX defines. As the RK3368 support is still fresh enough to allow a quick change, we do this now before having more code use this. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-31dm: Kconfig: fix typo in help for SPL_PINCTRLPhilipp Tomsich
Changes 'controlloers' to 'controllers' in the help-text for SPL_PINCTRL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Add support for drive-strength in PINCTRLRomain Perier
Currently, drive-strenght to 12ma are described and supposed to be used on RK3288. However, the pinctrl driver for this SoC only handles muxing and pull up/pull down via PU/PD control registers. So complex IPs like GMAC are working in normal ethernet 100mbps, but not at 1gbps typically. This commit adds support for handling drive-strength of 12ma, when it's defined in the DT. Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Revert MAC_TXCLK in pinctrl for GMACRomain Perier
This reverts TXCLK toggling that was accidently dropped while reworking commit 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the gmac ethernet interface"). So the TX clock is enabled and we can use GMAC_ROCKCHIP in 1Gbps when basic PINCTRL support is enabled (!PINTRL_FULL). Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Remove phy reset GPIO pull upRomain Perier
We should not handle this pin explicitly from pinctrl. GMAC driver takes care of it by using a "reset-gpio" in the DT. This commit removes pull up for GPIO4B0. Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-26Merge git://git.denx.de/u-boot-uniphierTom Rini
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