summaryrefslogtreecommitdiff
path: root/drivers/reset
AgeCommit message (Collapse)Author
2017-06-01dm: reset: Update uclass to support livetreeSimon Glass
Update the reset domain uclass to support livetree. Fix the xlate() method which has no callers. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: Rename dev_addr..() functionsSimon Glass
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: Use dm.h header when driver mode is usedSimon Glass
This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10dm: reset: add BCM6345 reset driverÁlvaro Fernández Rojas
This is a simplified version of linux/arch/mips/bcm63xx/reset.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08aspeed: Reset Drivermaxims@google.com
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to perform resets and thus depends on it. The actual Watchdog device used needs to be configured in Device Tree using "aspeed,wdt" property, which must be WDT phandle, for example: rst: reset-controller { compatible = "aspeed,ast2500-reset"; aspeed,wdt = <&wdt1>; } Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-26reset: Add STi reset supportPatrice Chotard
This patch adds a reset controller implementation for STMicroelectronics STi family SoCs; it allows a group of related reset like controls found in multiple system configuration registers to be represented by a single controller device. Driver code has been mainly extracted from kernel drivers/reset/sti/reset-stih407.c Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-02-08dm: core: Replace of_offset with accessorSimon Glass
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-13libfdt: Bring in upstream stringlist functionsSimon Glass
These have now landed upstream. The naming is different and in one case the function signature has changed. Update the code to match. This applies the following upstream commits by Thierry Reding <treding@nvidia.com> : 604e61e fdt: Add functions to retrieve strings 8702bd1 fdt: Add a function to get the index of a string 2218387 fdt: Add a function to count strings Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-10reset: uniphier: add reset controller driver for UniPhier SoCsMasahiro Yamada
This is the initial commit for UniPhier reset controller driver. Most code was ported from Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-27reset: implement a driver for the Tegra CARStephen Warren
Implement a reset uclass driver for the Tegra CAR. This allows clients to use standard reset APIs on Tegra. This device is intended to be instantiated by the core Tegra CAR driver, rather than being instantiated directly from DT. The implementation uses the existing custom Tegra- specific reset APIs to avoid coupling the series with significant refactoring of the existing Tegra clock/reset code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15reset: add Tegra186 reset driverStephen Warren
In Tegra186, on-SoC reset signals are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-06-19reset: implement a reset testStephen Warren
This adds a sandbox reset implementation (provider), a test client device, instantiates them both from Sandbox's DT, and adds a DM test that excercises everything. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19Add a reset driver framework/uclassStephen Warren
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips. This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two. The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>