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path: root/drivers/spi
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2018-05-16spi: fsl_qspi: remove superfluous assignmentHeinrich Schuchardt
In void *rx_addr = NULL; rx_add = A; the first assignment has no effect. Remove it. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: lpc32xx: simplify logical expressionHeinrich Schuchardt
A & A & B == A & B Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: atcspi200: avoid NULL dereferenceHeinrich Schuchardt
For SPI_XFER_BEGIN | SPI_XFER_END the code sets data_out = NULL. In the debug statement we should not dereference this value. As we do not transfer any data the debug statement is not needed in this case anyway. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Add reset supportPatrice Chotard
In some situation, QSPI controller is already configured by an early boot stage, adding reset support will insure that QSPI controller is started from a pristine state. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Use dev_read_xxx APIPatrice Chotard
Use dev_read_xxx() instead of old manner fdt_xxx() API Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Add chip select managementChristophe Kerello
Quad-SPI interface is able to manage 2 spi nor devices. FSEL bit selects the flash memory to be addressed in single flash mode. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Add st, stm32f469-qspi compatible stringChristophe Kerello
Add "st,stm32f469-qspi" compatible which is used on kernel side. This will be necessary when DT will be synchronised from kernel. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Align reg-names with kernel 4.12 RC1Christophe Kerello
Align qspi bindings following kernel dt-bindings Documentation/devicetree/bindings/mtd/stm32-quadspi.txt from kernel v4.12-rc1. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Sort include files alphabeticallyPatrice Chotard
Sort include files by alphabetical order Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Solve issue detected by checkpatchPatrick Delaunay
Fix parameters function alingemnt Fix variable declaration Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16spi: stm32_qspi: Remove CONFIG_CLK flagPatrice Chotard
As all platforms which uses this driver have CONFIG_CLK flag enable in their defconfig, we can remove it from driver code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-14spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequencyMarek Behún
Since now we have driver for clocks on Armada 37xx, use it to determine SQF clock frequency for the SPI driver. Also change the default config files for Armada 37xx devices so that the clock driver is enabled by default, otherwise the SPI driver cannot be enabled. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-09spi: fsl_qspi: Introduce is_controller_busy functionRajat Srivastava
Some SoCs have different endianness of QSPI IP if compared to endianness of core. The function is_controller_busy() checks if the QSPI controller is busy or not, considering the endianness of the QSPI IP. Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Convert CONFIG_SPI to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_SPI This partly involves updating code that assumes that CONFIG_SPI implies things that are specific to the MPC8xx SPI driver. For now, just update the CONFIG tests. This also involves reworking the default for CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a reasonable default, as it does not cause any compile failures. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-23spi: dw: invert wait condition in dw_spi_xferEugeniy Paltsev
While switching to readl_poll_timeout macros from custom code the waiting condition was accidently inverted, so it was pure luck that this code works at least in some conditions. Fix that by inverting exit condition for readl_poll_timeout. Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush") Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-11spi: sh_qspi: Make use of the 32byte FIFOMarek Vasut
The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing the SPI transmission 1 byte at time, if there is a 32byte chunk of data to be transferred, fill the FIFO completely and then transfer the data to/from the FIFO. This increases the SPI NOR access speed significantly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11spi: sh_qspi: Replace ad hoc waiting with wait_for_bitMarek Vasut
Replace the ad-hoc endless loops with wait_for_bit() with reasonable timeout. Note that the loops had internal 10uS delays, although there is no reason for those on this HW, so they are dropped. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11spi: sh_qspi: Drop SPBDCR waitMarek Vasut
Waiting for SPBDCR == 1 is not required and is covered by the subsequent wait for SPSR_SPRFF, so drop this. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11spi: sh_qspi: Replace data types with short onesMarek Vasut
Just replace unsigned {char,short,long} with u{8,16,32}, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11mtd: spi: Add Renesas RPC SPI-flash driverMarek Vasut
Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperflash mode. Note that this block is extremely selective when communicating with the SPI NOR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-07Revert "spi: atmel: Drop non-dm code"Tom Rini
As we aren't quite able to convert some platforms with a very small size limit in SPL yet, we need to revert this for now. This reverts commit 7b0947787358c6b277431d6b76ce043d8bec641d. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07Revert "spi: atmel: Drop atmel_spi.h"Tom Rini
As we aren't quite able to convert some platforms with a very small size limit in SPL yet, we need to revert this for now. This reverts commit 37434db29be495ef41f204a97b8bf13b1418f97d. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-06powercp: mpc8xx: move commproc.hChristophe Leroy
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and move it into arch/powerpc/include/asm Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xxChristophe Leroy
CONFIG_8xx doesn't mean much outside of arch/powerpc/ This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ... It also renames 8xx_immap.h to immap_8xx.h to be consistent with other file names. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06spi: atmel: default y if DM_SPI && ARCH_AT91Jagan Teki
ATMEL_SPI is now fully converted to driver-model and respective boards switch to DM_SPI as well, so make default y for ARCH_AT91 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06spi: atmel: Drop atmel_spi.hJagan Teki
atmel_spi.h has register offsets, and atmel_spi_slave structure, move it into .c file for better readability and drop atmel_spi.h Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06spi: atmel: Drop non-dm codeJagan Teki
All board configs are now enabled DM_SPI for SPL and U-Boot proper, so now its time to drop non-dm code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06spi: atmel: Add ifdef for DM_GPIO codeJagan Teki
Few boards are configuring gpio directly from board instead using drivers/gpio so add ifdef for DM_GPIO to compatible for both the cases. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-03-23omap3: spi: Correct ti, pindir-d0-out-d1-in parsingSjoerd Simons
The ti,pindir-d0-out-d1-in property is not expected to have a value according to the device-tree binding, so treat it as a boolean not a uint property. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22DW SPI: use 32 bit access instead of 16 and 32 bit mixEugeniy Paltsev
Current DW SPI driver uses 32 bit access for some registers and 16 bit access for others. So if DW SPI IP is connected via bus which doesn't support 16 bit access we will get bus error. Fix that by switching to 32 bit access only instead of 16 and 32 bit mix Additional Documentation to Support this Change: The DW_apb_ssi databook states: "All registers in the DW_apb_ssi are addressed at 32-bit boundaries to remain consistent with the AHB bus. Where the physical size of any register is less than 32-bits wide, the upper unused bits of the 32-bit boundary are reserved. Writing to these bits has no effect; reading from these bits returns 0." [1] [1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22DW SPI: add option to use external gpio for chip selectEugeniy Paltsev
DW SPI internal chip select management has limitation: it hold CS line in active state only when the FIFO is not empty. If the FIFO freed before we add new data the SPI transaction will be broken. So add option to use external gpio for chip select. Gpio can be added via device tree using standard gpio bindings. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22DW SPI: refactor poll_transfer functionsEugeniy Paltsev
There is no sense in waiting for RX data in dw_reader function: there is no chance that RX data will appear in RX FIFO if RX FIFO is empty after previous TX write in dw_writer function. So get rid of this waiting. After that we can get rid of dw_reader return value and make it returning void. After that we can get rid of dw_reader return value check in poll_transfer function. With these changes we're getting closer to Linux DW SPI driver. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22DW SPI: fix transmit only modeEugeniy Paltsev
In current implementation we get -ETIMEDOUT error when we try to use transmit only mode (SPI_TMOD_TO) This happens because in transmit only mode input FIFO never gets any data which breaks our logic in dw_reader(): we are waiting until RX data will be ready in dw_reader, but this newer happens, so we return with error. Fix that by using SPI_TMOD_TR instead of SPI_TMOD_TO which allows to use RX FIFO. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22DW SPI: fix tx data loss on FIFO flushEugeniy Paltsev
In current implementation if some data still exists in Tx FIFO it can be silently flushed, i.e. dropped on disabling of the controller, which happens when writing 0 to DW_SPI_SSIENR (it happens in the beginning of new transfer) So add wait for current transmit operation to complete to be sure that current transmit operation is finished before new one. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-15Merge git://git.denx.de/u-boot-spiTom Rini
2018-03-14spi: omap3: Fix redeclared errorJagan Teki
omap3_spi_set_speed|mode redeclared bus symbol, fix the same. error: drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’: drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of symbol struct udevice *bus = dev->parent; Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13board: stm32: switch to DM STM32 timerPatrice Chotard
Use available DM stm32_timer driver instead of dedicated mach-stm32/stm32fx/timer.c. Remove all defines or files previously used for timer usage in arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx Enable DM STM32_TIMER for STM32F4/F7 and H7. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13spi: omap3: Skip set_mode, set_speed from claimJagan Teki
set_mode, set_seed functions has separate function pointers in dm_spi_ops, so use them in relevent one instead of calling from claim_bus. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13spi: atcspi200: Drop non-dm codeJagan Teki
Boards adp-ae3xx_defconfig, nx25-ae250_defconfig already enabled DM_SPI, so non-dm code make no use of it hence droped. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-13spi: Migrate CONFIG_CF_SPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_KIRKWOOD_SPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_LPC32XX_SSP to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_MPC8XXX_SPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_MXC_SPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_MXS_SPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_SH_QSPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13spi: Migrate CONFIG_SH_SPI to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-07atcspi200: avoid possible NULL dereferenceHeinrich Schuchardt
Check if ns before and not after dereferencing it. Indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>