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The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks
have different clock gate control bit-fields.
The existing code was correct only for i.MX53, so this patch fixes the i.MX51
use case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Jana Rapava <fermata7@gmail.com>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
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Add to pxa25x based devices support for USB ethernet gadget. This is a
port of pxa25x UDC driver from Linux kernel.
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
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Removed DEV_CONFIG_CDC and DEV_CONFIG_SUBSET and replaced it with
CONFIG_USB_ETH_CDC and CONFIG_USB_ETH_SUBSET.
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
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Introduced CONFIG_USB_ETH_CDC and CONFIG_USB_ETH_SUBSET as preparation
for removal DEV_CONFIG_CDC and DEV_CONFIG_SUBSET
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
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PXA25X chips don't support alternate settings so driver uses non-CDC
driver.
But only code defined between DEV_CONFIG_CDC signals that network is up.
This patch is fixing this bug by signaling that network is up after USB
SET_INTERFACE request.
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
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Allows for easy configuration of the VBUS indicator related ULPI
config bits.
Also move the external indicator setup from ulpi_set_vbus() to
the new function.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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This is clearly some sort of debug output and should not
be printed during normal operation.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
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EHCI interface now supports more than one controller. Wire up our usb functions
to use this new interface.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
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Allows to initialize more than one USB controller at once.
v2: print message when controller stop fails
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
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Kill off ehci-core.h
It was used to specify some static controller data. To support more than
one controller being active at any time we have to carry the controller
data ourselfes. Change the ehci interface accordingly.
NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed
to do the same thing as other platforms. But the change for now is at least
compile clean.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
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Carry an index in the lowlevel usb functions to make specify the
respective usb controller.
Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
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Add AX88772B ID together with two fixes needed to make this work.
1. The packet length check has to be adjusted, as all ASIX chips
only use 11 bits to indicate the length. AX88772B uses the other
bits to indicate unrelated things, which cause the check to fail.
This fix is based on a fix for the Linux kernel by Marek Vasut.
Linux upstream commit: bca0beb9363f8487ac902931a50eb00180a2d14a
2. AX88772B provides several bulk endpoints. Only the first
IN/OUT endpoints work in the default configuration. So stop
enumeration after we found them to avoid overwriting the
endpoint config with a non-working one.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Initial device MAC should be read while getting info about the
device, so it's wrong to only read it in asix_init().
Add a dedicated function to read the initial MAC, which is also
able to handle devices that have their initial MAC stored in
EEPROM. Call this function inasix_eth_get_info().
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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All ASIX chipsets aside from AX88172 are able to set the MAC
address on the hardware level. Add a function to expose this
ability.
To differentiate between chip types we now carry flags as driver
private data. Also while touching the asix_dongles array
constify this.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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The basic device reset ensures that the device is ready to
service commands and does not need to get redone before each
network operation.
Split out the basic reset from asix_init() and instead call it
from asix_eth_get_info(), so that it only gets called once.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Avoid clutter in ueth_data. Individual drivers should not mess
with structures belonging to the core like this.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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usb_hub_descriptor has to be packed as it's used for
communication with the device. Member wHubCharacteristics
violates the natural alignment rules.
Use explicit unaligned access functions for this member.
Fixes ARMv7 traping while using USB.
v2: fix typo found by Thomas Langer
v3: rebased on top of u-boot-usb/master
Signed-off-by: Lucas Stach <dev@lynxeye.de>
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* 'master' of git://git.denx.de/u-boot-usb:
MUSB driver: Timeout is never detected as the while loop does not end
usb: fix ulpi_set_vbus prototype
pxa25x: Add UDC registers definitions
USB: Fix strict aliasing in ohci-hcd
usb: Optimize USB storage read/write
ehci: Optimize qTD allocations
usb_stor_BBB_transport: Do not delay when not required
usb_storage: Remove EHCI constraints
usb_storage: Restore non-EHCI support
ehci-hcd: Boost transfer speed
ehci: cosmetic: Define used constants
ehci: Fail for multi-transaction interrupt transfers
arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
arm:trats: Support for USB UDC driver at TRATS board.
dfu:cmd: Support for DFU u-boot command
dfu: MMC specific routines for DFU operation
dfu: DFU backend implementation
dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
dfu:usb: Support for g_dnl composite download gadget.
ehci: cosmetic: Define the number of qt_buffers
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Timeout variable is decremented once more when while condition is not met.
Following "if" does not detect correctly that timeout has occurred.
Because of this bug the "usb start" command on AM335X-EVM board did not detect correctly that USB device was not attached.
timeout = musb_cfg.timeout;
while (timeout--)
if (readb(&musbr->devctl) & MUSB_DEVCTL_HM)
break;
/* if musb core is not in host mode, then return */
if (!timeout)
return -1;
Signed-off-by: Matej Franceskin <Matej.Franceskin@comtrade.com>
CC: Marek Vasut <matex@denx.de>?
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commit 5f6aa03fda2a0a79940765865c1e4266be8a75f8
USB: Fix complaints about strict aliasing in OHCI-HCD
tried to fix this, but gcc4.4 still complains. So, this
patch basically reverts the above and does a simpler fix.
also, the above commit incorrectly changed
/* corresponds to data_buf[4-7] */
datab [1] = 0;
to
/* corresponds to databuf.u8[4-7] */
databuf.u8[1] = 0;
This patch also fixes that.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Relax the qTD transfer alignment constraints in order to need less qTDs for
buffers that are aligned to 512 bytes but not to pages.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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This patch takes advantage of the hardware EHCI qTD queuing mechanism to avoid
software and transfer splitting overhead so as to make transfers as fast as
possible.
The only drawback is a call to memalign. However, this is fast compared to the
transfer timings, and the heap size to allocate is small, e.g. 128 kiB in the
worst case for a transfer length of 65535 packets of 512 bytes.
Tested on i.MX25, i.MX35 and i.MX51. In my test conditions, the speed gain was
very significant (several times faster), which is really appreciable when
accessing large files.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Make some light cosmetic code cleanup by the way.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Interrupt transfers requiring several transactions are not supported by
submit_int_msg() because bInterval is ignored. This patch returns a failure code
and prints an error message in this case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Support for f_dfu USB function.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
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Composite USB download gadget support (g_dnl) for download functions.
This code works on top of composite gadget.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
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Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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The CLKCTRL registers are SoC specific so we ought to have it clear on
filename.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.
Move the usb header for da8xx platforms under arch-davinci.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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* 'next' of git://git.denx.de/u-boot:
MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
doc: cleanup - move board READMEs into respective board directories
net: sh_eth: add support for SH7757's GETHER
net: sh_eth: modify the definitions of regsiter
net: sh_eth: add SH_ETH_TYPE_ condition
net: sh_eth: clean up for the SH7757's code
net: fec_mxc: Fix MDC for xMII
net: fec_mxc: Fix setting of RCR for xMII
net: nfs: make NFS_TIMEOUT configurable
net: Inline the new eth_setenv_enetaddr_by_index function
net: allow setting env enetaddr from net device setting
net/designware: Consecutive writes to the same register to be avoided
CACHE: net: asix: Fix asix driver to work with data cache on
net: phy: micrel: make ksz9021 phy accessible
net: abort network initialization if the PHY driver fails
phylib: phy_startup() should return an error code on failure
net: tftp: fix type of block arg to store_block
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Align buffers passed to the USB code to cache line size so
they can be DMAed safely.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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Printing message could be useful if something goes really wrong.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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Buffer coming from upper layers should be cacheline aligned/padded
to perform safe cache operations. For now we don't do bounce
buffering so getting unaligned buffer is an upper layer error.
We can't check if the buffer is properly padded with current
interface so just assume it is (consider changing with in the
future). The following changes are done:
1. Remove useless length alignment check. We get actual transfer
length not the size of the underlying buffer so it's perfectly
valid for it to be unaligned.
2. Move flush_dcache_range() out of while loop or it will
flush too much.
3. Don't try to fix buffer address before calling invalidate:
if it's unaligned it's an error anyway so let cache subsystem
cry about that.
4. Fix end buffer address to be cacheline aligned assuming upper
layer reserved enough space. This is potentially dangerous
operation so upper layers should be careful about that.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency. In those cases, use that value rather than the USB spec
minimum. We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h. We cannot use MAX() here
as we are not allowed to have tests inside of align(...).
Signed-off-by: Tom Rini <trini@ti.com>
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut <marex@denx.de>
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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Move or_asynclistaddr programming to ehci_submit_async()
function to make sure queue head is properly programmed
before every transfer. This solves the problem with changing
qh address.
Also remove unneeded qh_list->qh_link reprogramming at the
end of transfer.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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This has never been completely sufficient and now happens too late to
paper over the cache coherency problems with the current USB stack.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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The asix driver did not align buffers, therefore it didn't work
with data cache enabled. Fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
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* 'master' of git://git.denx.de/u-boot-arm:
tegra: define fdt_load/fdt_high variables
tegra: enable bootz command
tegra: usb: Fix device enumeration problem of USB1
tegra: trimslice: set up serial flash pinmux
tegra: add pin_mux_spi() board initialization function
tegra: add GMC/GMD funcmux entry for SFLASH
tegra: bootcmd: start USB only when needed
tegra: bootcmd enhancements
tegra: add enterrcm command
tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG
Add env vars describing U-Boot target board
tegra: usb: fix wrong error check
tegra: add ULPI on USB2 funcmux entry
tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
tegra: Add Tamonten Evaluation Carrier support
tegra: Use SD write-protect GPIO on Tamonten
tegra: Implement gpio_early_init() on Tamonten
tegra: Allow boards to perform early GPIO setup
tegra: plutux: Add device tree support
tegra: medcom: Add device tree support
tegra: Rework Tamonten support
beagle: add eeprom expansion board info for bct brettl4
Signed-off-by: Wolfgang Denk <wd@denx.de>
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A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like "usb reset" in u-boot command line).
This will be treated as an error and stops later device enumeration.
Therefore we clear that bit after Port Reset in order to proceed
later device enumeration.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This patch adds functions to enable/disable the power of USB
host controller for EXYNOS5.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
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This patch adds a function to set usb host mode to USB 2.0 HOST Link
for EXYNOS5
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
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This patch incorates the review comments given by Minkyu Kang for
EHCI support on EXYNOS
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
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Commit 7a101e946cba55e32d3d1265e30456c810046da3 introduced following warning:
---8<---
ehci-atmel.c: In function 'ehci_hcd_init':
ehci-atmel.c:49:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses]
ehci-atmel.c: In function 'ehci_hcd_stop':
ehci-atmel.c:79:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses]
--->8---
This patch fixes it.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Bo Shen <voice.shen@atmel.com>
cc: Marek Vasut <marex@denx.de>
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Some Atmel SoC support USB EHCI, add the EHCI driver to support it.
To enable the USB EHCI, add the following configuration options into
board relative configuration file and remove USB OHCI options.
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm. I have no compiler for them, but
the remaining issues should be far less than without this patch.
Any outstanding issues are left to the maintainers of boards that use
these drivers.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
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Fix:
asix.c: In function 'asix_eth_get_info':
asix.c:629:12: warning: assignment from incompatible pointer type
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Fix:
smsc95xx.c: In function 'smsc95xx_eth_get_info':
smsc95xx.c:869:12: warning: assignment from incompatible pointer type
[enabled by default]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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