| Age | Commit message (Collapse) | Author |
|---|
|
Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
|
|
Put these at the top of the file so they are in one place. Also add function
prototypes to the header file to avoid call site mismatches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
|
|
Add a uclass that can represent a USB controller. For now we do not create
devices for things attached to the controller. This will be added later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
|
|
Commit d3cfcb3 (ARM: DRA7: Enable clocks for USB OTGSS and USB PHY)
changed the member names of prcm_regs from cm_l3init_usb_otg_ss_clkctrl
to cm_l3init_usb_otg_ss1_clkctrl and from cm_coreaon_usb_phy_core_clkctrl
to cm_coreaon_usb_phy1_core_clkctrl in order to differentiate between
the two dwc3 controllers present in dra7xx/am43xx and enabled these
clocks in enable_basic_clocks() in hw_data.c. However these clocks
continued to be enabled in board files/driver files for dwc3 host
mode functionality causing compilation break with few configs.
Fixed it here by making all the clocks enabled in enable_basic_clocks()
and removing it from board files/driver files here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
|
|
|
|
VBUS detection could be needed not only by the musb code (to prevent host mode),
but also by e.g. gadget drivers to start only when a cable is connected.
In addition, this allows more flexibility in vbus detection, as it could easily
be extended to other USBC indexes. Eventually, this would help making musb
support independent from a hardcoded USB controller index (0).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
|
VBUS detection and enable is now be used with virtual AXP GPIOs, so all the USB
code has to use GPIO in every case and let sunxi_gpio do the heavy lifting.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
|
The "fastboot reboot-bootloader" command is defined to
re-enter into fastboot mode after rebooting into
bootloader. This command is usually used after updating
bootloader via fastboot.
This commit implements only a generic side of the
command - setting of the reset flag and then resetting.
Setting of the reset flag is implemented using __weak
fb_set_reboot_flag() function. The actual setting and
checking of the reset flag should be implemented by
a boot script and/or board/SoC specific code.
Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
Tested-by: Steve Rae <srae@broadcom.com>
[Test HW: bcm28155_ap board]
|
|
Storing thor device struct as an EP private data. It is necessary for
DWC3 operation.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
|
For u-boot dwc3 driver the scatter gather list support has been removed
from original linux code. It is correct, since we try to send one request
at a time.
However, the cleanup left spurious break, which caused early exit from
loop at dwc3_cleanup_done_reqs() function. As a result the dwc3_gadget_giveback()
wasn't called and caused USB Mass Storage to hang.
This commit removes this problem and refactor the code to remove superfluous
do { } while(1) loop.
Test HW: Odroid XU3 (with ./test/ums/ums_gadget_test.sh)
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Commit "drivers/dwc3: add a workaround for too small OUT requests"
sets max packet for OUT requests when transfer is smaller.
Until this change the default maxpacket for non EP0 EPs was 1024. This is
too much, since UMS LBA size is 512B
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
be LST
It turned out that current dwc3 gadget code is preparing multiple TRBs
for a transfer. Unfortunately, when multiple requests are in the same
queue, only for the last one the LST (last) ctrl bit is set.
Due to that dwc3 HW executes all TRBs up till the one marked as last.
Unfortunately, UMS requires call of ->complete callback after any send TRB.
This is the reason for "hangs" in executing UMS.
This code simplifies this situation and set each TRB's ctrl field bit to be
last (LST bit).
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
There is no point in calling dwc3_thread_interrupt() if no event is
pending. There is also no point in flushing event cache in EVERY loop
iteration.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
|
This patch adds code to select standard, commonly used usb endpoint
configuration (ep1in-bulk, ep2out-bulk, ep3in-int) to dwc3 driver. This
ensures compatibility with old userspace and windows drivers, which
expects hardcoded endpoint numbers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
|
DWC3 hangs on OUT requests smaller than maxpacket size,
so HACK the request length to be at least equal to maxpacket size.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
|
This commit makes the dwc3_set_mode() as static, to prevent collisions.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
The BIT() macro is used only in those places, so it is reasonable to
replace it by a constant value.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
DWC3 UDC driver requires presence of .reset callback in a composite driver.
This setting is similar to the one nowadays present in linux kernel.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Since we support multiple dwc3 controllers to be existent at the same
time, in order to handle the interrupts of a particular dwc3 controller
usb_gadget_handle_interrutps should take controller index as an
argument.
Hence the API of usb_gadget_handle_interrupts is modified to take
controller index as an argument and made the corresponding changes to all
the usb_gadget_handle_interrupts calls.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Taken from linux kernel with commit
commit 765f5b830e547229bb752e7b232ee83e2b3d49d5
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Thu Jun 23 14:26:11 2011 +0200
usb: gadget: defer setting maxpacket till ->setup()
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Now that the entire dwc3 driver is adapted to compile with uboot build,
modify the Makefiles so that the dwc3 driver can be built.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
dwc3 can do only max packet aligned transfers. So in case request length
is not max packet aligned and is bigger than DWC3_EP0_BOUNCE_SIZE
two chained TRBs is required to handle the transfer.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
No functional change. Modified few things so that there are no
code duplication while implementing chained TRB.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
In the linux kernel, non cacheable buffers are used. However in uboot
since there are no APIs to allocate non cacheable memory, all
the buffers should be flushed before using it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
|
|
Added a single driver for both USB2 PHY programming and USB3 PHY
programming.
USB3 PHY is taken from drivers/phy/phy-ti-pipe3.c in linux kernel.
commit 56042e : phy: ti-pipe3: Fix suspend/resume and module reload.
USB2 PHY is taken from drivers/phy/phy-omap-usb2.c in linux kernel.
commit eb82a3 : phy: omap-usb2: Balance pm_runtime_enable() on probe
failure and remove.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added an API to check for interrupt status. This API is generally
called from board file to check for interrupt status.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added support for multiple dwc3 omap controllers. This gives uboot
the capability to control multiple dwc3 omap controllers.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Removed probe and remove that are specific to linux and replaced it with
uboot init and uboot exit. These functions will be invoked from boardfile.
This will change once we have dwc3-omap driver adapted to use the uboot
driver model.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added a structure to populate dwc3 omap platform data. The board file should
populate these platform data before invoking dwc3 omap driver.
This will be removed once dwc3-omap driver is adapted to use the driver model.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
*) Changed the included header files to that used in u-boot.
*) Removed extcon_* APIs
*) Removed regulator_* APIs
*) Fixed other misc warnings
*) Added dwc3-omap.h to include the definitions of UTMI modes.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Since interrupt support is not present in u-boot, added an
API to handle the interrupts in dwc3 core. This API can be
polled to handle the interrupts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added support for multiple dwc3 controllers. This gives uboot
the capability to control multiple dwc3 controllers.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Removed probe and remove that are specific to linux and replaced it with
uboot init and uboot exit. These functions will be invoked from boardfile.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
*) Changed the include header files to that used in u-boot.
*) Removed phy_* APIs
*) Removed jiffies and used a simple while loop
*) Used dma_alloc_coherent and dma_free_coherent APIs of u-boot
*) Fixed other misc warnings
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
*) Changed the included header files to that used in u-boot.
*) added dwc3_ep_event_string() used in ep0.c
*) Fixed other misc warnings
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Did a bunch of things to get dwc3/gadget.c compile in u-boot without
build errors and warnings
*) Changed the included header files to that used in u-boot.
*) Used dma_alloc_coherent and dma_free_coherent APIs of u-boot
*) removed sg support
*) remove jiffies and used a simple while loop
*) removed irq support and added a function to call these interrupt handler.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added a header file to include various linux specific APIs like
pr_debug, WARN_ WARN_ON_ONCE etc.. in order to avoid compilation
error while building dwc3 driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Removed all pm related operations including pm_runtime APIs,
suspend/resume hooks as support for these are not present in u-boot.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Changed the header files included in core.h and io.h to the u-boot header
files so that these files can be included in other dwc3 source files and
be compiled in uboot. Also added otg.h which has the defines for dr_mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Removed most of the trace_* APIs from dwc3 driver since tracepoints are not
supported in u-boot. Replaced some of the trace_* API with dev_dbg/dev/vdbg.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Review-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Modified the file header to the format that is used in u-boot. Also
included in the header, the commit in linux kernel from which each of
these files are added.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
removed un-used/un-supported files from dwc3. These files can be added
later as and when the support is added.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added dwc3 folder from linux kernel 3.19-rc1 (97bf6af1f9)
to u-boot. This will be adapted to work with u-boot in the
following patches.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Make udc-core compile in u-boot by removing all linux specific
stuff and having only the bare minimal udc-core required for
usb gadget drivers. Also modified the file header to a format that is
generally being used in u-boot.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
Added udc-core.c from linux kernel 3.19-rc1 (97bf6af1f9) to u-boot.
This will be adapted to work with u-boot in the
following patches.
Adding support for udc will help to seamlessly port dwc3 driver from
linux kernel to u-boot (since dwc3 uses udc-core) and it'll also help
to add support for multiple gadget controllers to be functional at the
same time.
All other gadget drivers can also be adapted to use udc-core.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
|
|
IIUC, interrupt transfers are NAK'd by devices until they wish to trigger
an interrupt, and e.g. EHCI controllers retry these in HW until they are
ACK'd. However, DWC2 doesn't seem to retry, so we need to do this in SW.
In practice, I've seen DWC2_HCINT_FRMOVRUN happen too. I'm not quite sure
what this error implies; perhaps it's related to how near the end of a
USB frame we're at when the interrupt transfer is initiated? Anyway,
retrying this temporary error seems to be necessary too.
With all these commits applied, both my USB keyboards (one LS Lenovo and
one FS Dell) work correctly when there is no USB hub between the SoC and
the keyboard; We still need split transactions to be implemented for hubs
to work.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
|
|
As best I can tell, there's no difference between bulk and interrupt
transfers in terms of how the HW should be programmed, at least given
that we're executing one transaction at a time rather than scheduling
them into frames for maximum throughput.
This patch ends up sharing the toggle bit state between bulk and
interrupt transfers on a particular EP. However I believe this is fine;
AFAIK a given EP either uses bulk or interrupt transfers and doesn't mix
them.
This patch doesn't do anything with the "interval" parameter for
interrupt transfers, but then most other USB controller drivers in U-Boot
don't either.
It turns out that one of my keyboards is happy to work using control
transfers but the other only gives non-zero "HID reports" via interrupt
transfers.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
|
|
A bit must be set in HCCHAR when communicating with low-speed devices.
I have no idea why there's no corresponding bit to distinguish between
full-speed and high-speed devices, but no matter; they all work now!
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
|
|
This doesn't make my LS keyboard work any better, but it does at least
report the correct speed in "usb tree".
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
|
|
Use of these APIs is required on the Raspberry Pi. With this change, USB
on RPi1 should be more reliable, and USB on the RPi2 will start working.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
|
