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Add support for Numonyx N25Q32A SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for Numonyx N25Q32 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for Numonyx N25Q64A SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for Winbond's W25Q64W SPI flash.
This device is used on xilinx zynq emulation platform.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch corrected the first byte of idcode1 for S25FL256S SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- arm_dcc_dev is already initialized.
- Remove unused rc variable
Warning log:
arm_dcc.c: In function 'drv_arm_dcc_init':
arm_dcc.c:145:6: warning: unused variable 'rc' [-Wunused-variable]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>
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CONFIG_ARM_DCC_MULTI should be also removed in the patch
"serial: Remove CONFIG_SERIAL_MULTI from serial drivers"
(sha1: a3827250606895ec2dd4b8d867342b7cabf3692f)
Because the driver defines serial_* functions
which cause conflict with serial.c (multiple definition of serial_*)
Removing CONFIG_SERIAL_MULTI function also require to define
default_serial_console for cases where another serial driver
is not available in the system.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>
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Add support for Numonyx N25Q064 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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prototype in "block_dev_desc_t"
Currently we have "unsigned long blkcnt" which is fine with
CONFIG_SYS_64BIT_LBA undefined because "lbaint_t" is basically the same
"unsigned long".
If CONFIG_SYS_64BIT_LBA gets defined "lbaint_t" is defined as "unsigned
long long".
Even though not many embedded systems have CONFIG_SYS_64BIT_LBA defined
it's good to have types in function implementation that match exactly
with prototypes.
Signed-off-by: Alexey Brodkin <alexey.brodkin@gmail.com>
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This is used by both powerpc and arm, but I think it still qualifies as
architecture-specific.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move ips_clk and csb_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move ipb_clk and pci_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move the quantative easing fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move these fields into arch_global_data and tidy up. This is needed for
both ppc and m68k since they share the i2c driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
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to make sure it is in the clear state.
Signed-off-by: Jason Wu <huanyu@xilinx.com>
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System ACE compact flash controller supports either 8-bit (default) or
16-bit data transfers. And in corresponding driver we need to implement
read/write of 16-bit data words properly for both modes of operation.
In existing code if width==8 both branches get executed which may cause
unexpected behavior of SystemAce controller.
Addition of "else" fixes described issue and execution is done as
expected for both (8-bit and 16-bit) data bus widths.
Signed-off-by: Alexey Brodkin <alexey.brodkin@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
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B4420 is a reduced personality of B4860 with fewer core/clusters(both SC3900
and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and
reduced target frequencies.
Key differences between B4860 and B4420
----------------------------------------
B4420 has:
1. Fewer e6500 cores: 1 cluster with 2 e6500 cores
2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster.
3. Single DDRC
4. 2X 4 lane serdes
5. 3 SGMII interfaces
6. no sRIO
7. no 10G
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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- Added some more serdes1 and serdes2 combinations
serdes1= 0x2c, 0x2d, 0x2e
serdes2= 0x7a, 0x8d, 0x98
- Updated Number of DDR controllers to 2.
- Added FMAN file for B4860, drivers/net/fm/b4860.c
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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The local functions in the mxs i2c driver are not marked static, make it so.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
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The MX23 has different layout of DMA channels. Fix the MMC
driver to support MX23.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Some MXS based boards do not implement the card-detect signal. Allow
user to specify alternate card-detect implementation.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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This does the same reset mask as done in v3.7 Linux kernel code.
The block is properly configured for MMC operation that way.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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The MX23 has less channels for the APBH DMA, sligtly different register
layout and some bits in those registers are placed differently. Reflect
this in the driver. This patch fixes MMC/DMA issue on MX23.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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This allows us to create the phydev before calling
fec_probe in later patch.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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This allows us to create the phydev before calling
fec_probe in later patch.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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It is useful to be able to try a range of
possible phy addresses to connect.
Also, an ethernet device is not required
to use phy_find_by_mask leading to better
separation of mii vs ethernet, as suggested
by Andy Fleming.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Having only one call to fec_probe will ease the changing of its
parameters.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Only the hardware ethernet registers are needed
for this function, so don't pass the more general
structure. I'm trying to separate MII and fec.
This also fixes MX28 fec_mii_setspeed use on secondary ethernet port
This was found by inspection of the code and should be
checked on real hardware.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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It is more logical to test for CONFIG_FEC_MXC_PHYADDR
to determine whether to define the function fecmxc_initialize.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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The MX23 can only use two SSP ports.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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The clock data are not used by the driver, drop them.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Instead of storing the computed line length in a local variable, store
it in the global lcd_line_length variable to make sure the LCD subsystem
can properly draw content for the display resolution.
This probably wasn't noticed yet because the only board where LCD
support is currently enabled is Seaboard, which runs at a 1366x768
resolution. As it happens this is the maximum resolution supported and
also the default that is used to initialize the framebuffer before the
configuration from DT is available.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
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Previously, the call to draw_logo() was happening irrespective
of whether we have selected logo or LCD console.
With this patch we call draw_logo() only when CONFIG_CMD_BMP is selected.
This would even fix the following compilation warning:
exynos_fb.c: In function 'draw_logo':
exynos_fb.c:74:8: warning: variable 'addr' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:9: warning: variable 'y' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:6: warning: variable 'x' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Remove unused variable disp_info to fix the following compilation warning:
exynos_dp.c: In function 'exynos_init_dp':
exynos_dp.c:860:23: warning: variable 'disp_info' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch resolves the following build errors for I2C driver in
VCMA9:
In file included from s3c24x0_i2c.c:40:0:
s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type
s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not
in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but
not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning:
'i2c_busses' defined but not used [-Wunused-variable]
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Use a common watchdog driver for all these cpus.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.
Add a new option to avoid this:
CONFIG_SYS_NS16550_BROKEN_TEMT
16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
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Report the usage of the Advanced Sector Protection (PPB) to the user
upon 'flinfo' command. E.g:
Bank # 1: CFI conformant flash (16 x 16) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
Advanced Sector Protection (PPB) enabled
Erase timeout: 16384 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 32 bytes
Sector Start Addresses:
FC000000 E FC020000 E RO FC040000 E FC060000 E FC080000 E
...
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
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Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support this type
of locking/unlocking. Detection of support is done in the same way as
done for the Spansion chips - via the 0x49 CFI word.
This patch enables this PPB protection mechanism for all AMD type
(AMD commandset) chips.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
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