summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2020-02-20mmc: sdhci: put the aligned buffer pointer to struct sdhci_hostMasahiro Yamada
Using the global variable does not look nice. Add a new field sthci::align_buffer to point to the bounce buffer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-19dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>Masahiro Yamada
The implementation of dma_map_single() and dma_unmap_single() is exactly the same for all the architectures that support them. Factor them out to <linux/dma-mapping.h>, and make all drivers to include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>. If we need to differentiate them for some architectures, we can move the generic definitions to <asm-generic/dma-mapping.h>. Add some comments to the helpers. The concept is quite similar to the DMA-API of Linux kernel. Drivers are agnostic about what is going on behind the scene. Just call dma_map_single() before the DMA, and dma_unmap_single() after it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19dma-mapping: fix the prototype of dma_unmap_single()Masahiro Yamada
dma_unmap_single() takes the dma address, not virtual address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19mmc: fsl_esdhc: actually enable cache snooping on mpc830xRasmus Villemoes
The reference manuals for MPC8308 and MPC8309 both say that the esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the System configuration registers. Unfortunately, that doesn't mean that the registers are just mirrors of each other - any write to esdhcctl is simply ignored. So to actually enable cache snooping, we unfortunately have to add a little ifdeffery. There is, naturally, no description of the bit fields of esdhcctl in the MPC8309 manual, but comparing the description of esdhcctl from the LS1021A reference manual to the description of the sdhccr in MPC8309, one also finds that the fields are bit-reversed, so the bit to set is 0x02000000 rather than 0x00000040 - this is also what board_mmc_init() uses in the two gdsys/mpc8308/ boards. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-02-18i2c: designware_i2c: Correct the selection of speed modeSimon Glass
Unfortunately a recent change adjusted the order of the checks here such that 400MHz now shows up as fast-plus speed (1Mbps). Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: d96440d1e3 ("i2c: designware_i2c: Add support for fast-plus speed")
2020-02-17mmc: remove unneeded forward declarationsMasahiro Yamada
These functions are defined before the callers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-02-17mmc: check the return value of mmc_select_mode_and_width()Masahiro Yamada
Since commit 01298da31d92 ("mmc: Change mode when switching to a boot partition"), errors in mmc_select_mode_and_width() are ignored. The return value should be checked. Fixes: 01298da31d92 ("mmc: Change mode when switching to a boot partition") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-02-17mmc: sdhci-cadence: send tune request twice to work around errataMasahiro Yamada
Cadence sent out an errata report to their customers of this IP. This errata is not so severe, but the tune request should be sent twice to avoid the potential issue. Quote from the report: Problem Summary --------------- The IP6116 SD/eMMC PHY design has a timing issue on receive data path. This issue may lead to an incorrect values of read/write pointers of the synchronization FIFO. Such a situation can happen at the SDR104 and HS200 tuning procedure when the PHY is requested to change a phase of sampling clock when moving to the next tuning iteration. Workarounds ----------- The following are valid workarounds to resolve the issue: 1. In eMMC mode, software sends tune request twice instead of once at each iteration. This means that the clock phase is not changed on the second request so there is no potential for clock instability. 2. In SD mode, software must not use the hardware tuning and instead perform an almost identical procedure to eMMC, using the HRS34 Tune Force register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-17mmc: fix the build error when MMC_WRITE is disabledJaehoon Chung
erase_grp_size is used, when MMC_WRITE is enabled. - error: ‘struct mmc’ has no member named ‘erase_grp_size’ Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-02-17drivers: mmc: rpmb: Use R1 responseBharat Kumar Reddy Gooty
If the host has Broken R1B, use only R1 response type. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-02-14Merge tag 'u-boot-stm32-20200214' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - add DH Electronics DHCOM SoM and PDK2 board - DT alignment with kernel v5.5-rc7 for stm32mp1 boards - fix STM32 image format for big endian hosts in mkimage - solve warnings in device tree and code for stm32mp1 boards - remove fdt_high and initrd_high for stm32 and stih boards - add support of STM32MP15x Rev.Z - update stm32mp1 readme
2020-02-13clk: stm32mp1: solve type issue in stm32mp1_lse_enable and stm32mp1_clktreePatrick Delaunay
Solve type issue in stm32mp1_lse_enable and stm32mp1_clktree. This patch solves the warnings when compiling with W=1 on stm32mp1 board: clk_stm32mp1.c: In function ‘stm32mp1_lse_enable’: clk_stm32mp1.c:1238:15: warning: comparison of integer expressions of different signedness: ‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare] clk_stm32mp1.c:1239:13: warning: comparison of integer expressions of different signedness: ‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare] clk_stm32mp1.c: In function ‘stm32mp1_clktree’: clk_stm32mp1.c:1814:17: warning: comparison of integer expressions of different signedness: ‘int’ and ‘unsigned int’ [-Wsign-compare] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13pinctrl: stmfx: update the result type of dm_i2c_reg_readPatrick Delaunay
Use int as result of dm_i2c_reg_read to avoid warning with W=1 (warning: comparison is always false due to limited range of data type [-Wtype-limits]) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13ram: rockchip: Fix Kconfig dependency for RAM_ROCKCHIP_DEBUGMichal Simek
There is no reason to show RAM_ROCKCHIP_DEBUG entry in other .config files as I see it for Xilinx ZynqMP. \# CONFIG_U_QE is not set \# CONFIG_RAM is not set CONFIG_RAM_ROCKCHIP_DEBUG=y Add missing dependency on RAM_ROCKCHIP driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-12CLK: HSDK: fix HDMI clock calculationEugeniy Paltsev
HDMI PLL has its own xtal with 27 MHz output but we treat it the same way as other PLLs with 33.33 MHz input. Fix that. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12CLK: HSDK: Check for PLL bypass firstlyEugeniy Paltsev
Pll bypass has priority over enable/disable. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-11Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini
sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
2020-02-10regulator: fix: Move code to enable gpio regulator to pre_probe from ↵Lukasz Majewski
ofdata_to_platdata The commit e8e9715df2d4 ("regulator: fixed: Modify enable-active-high behavior") fixed the regulator driver behavior when 'enable-active-high' is defined. Unfortunately, this patch used dm_regulator_platdata()'s "boot_on" member to set GPIOD_IS_OUT_ACTIVE flag and enable the regulator. The issue here is that regulator_common_ofdata_to_platdata() is called _before_ regulator_pre_probe() function in which the 'regulator-boot-on' property is asserted. As a result the GPIOD_IS_OUT_ACTIVE flag is not set and gpio_request_by_name() called in the former function is not enabling the regulator. This is problematic for e.g. i.MX ethernet driver, which then tries to perform initialization without power (and fails). The solution here is to explicitly enable regulator in regulator_pre_probe() callback only when 'regulator-boot-on' property is present in device tree. The GPIOD_IS_OUT_ACTIVE flag is not set at all, but relevant gpio is requested. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Tested-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-10Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Move P2SB from Apollo Lake to a more generic location - Add a function to find a device by drvdata in DM core - Enhancement of DM IRQ uclass driver - Add a clock driver for Intel devices - Add support for ACPI general-purpose events - Add a TPM driver for H1/Cr50 - Enable TPM on Google Chromebook Coral
2020-02-10Merge tag 'fixes-for-v2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix Coverity CID 280902 issue in vid_console_color() - fix vid_console_color() build warning - fix for mxsfb to ensure correct Linux logo position
2020-02-09misc: i2c_eeprom: set offset len and chip addr offset maskRobert Beckett
Set the correct offset length and chip address offset mask for each device to allow correct access to total capacity of the devices. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09gpio: Let DM_74X164 be built without CONFIG_SPL_GPIOFabio Estevam
Since commit bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") CONFIG_DM_74X164 is no longer built for mx7dsabresd_defconfig, as this target does not use CONFIG_SPL_GPIO. Remove such dependency and let the the 74X164 GPIO driver be built again. This restores Ethernet functionality on the imx7-sdb board as the Ethernet reset PHY comes from a GPIO driven by a 74LV595PW I/O expander. Fixes: bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-02-07serial: serial_cortina: add UART DM driver for CAxxxx SoCsJason Li
Add serial UART driver support for all Cortina Access CAxxxx family of SoCs. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07watchdog: cortina_wdt: add support for HW WDT on CAxxxx SoCsJason Li
Add support for hardware watchdog timer on all Cortina Access CAxxxx family of SoCs. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07gpio: cortina_gpio: add DM_GPIO driver for CAxxxx SoCsJason Li
DM_GPIO based GPIO controller driver for CAxxxx SoCs. This driver support multiple CPU architectures and Cortina Access SoC platforms. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07eth: mtk-eth: aarch64: fix build warnings on ethernet-driverFrank Wunderlich
building mtk ethernet driver for aarch64 (mt7622) results in warnings/errors "error: cast from pointer to integer of different size" Fixes: 23f17164d9 ("ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs") Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-02-07eth: mtk-eth: add mt7622 support in mediatek eth driverMarkLee
This patch add mt7622 support in mediatek eth driver Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07eth: mtk-eth: add sgmii mode support in mediatek eth driverMarkLee
This patch add sgmii init part for the mediatek SoC that support sgmii mode. It is a must for mt7622. Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07tpm: Add a driver for H1/Cr50Simon Glass
H1 is a Google security chip present in recent Chromebooks, Pixel phones and other devices. Cr50 is the name of the software that runs on H1 in Chromebooks. This chip is used to handle TPM-like functionality and also has quite a few additional features. Add a driver for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-07dm: irq: Add support for requesting interruptsSimon Glass
At present driver model supports the IRQ uclass but there is no way to request a particular interrupt for a driver. Add a mechanism, similar to clock and reset, to read the interrupts required by a device from the device tree and to request those interrupts. U-Boot itself does not have interrupt-driven handlers, so just provide a means to read and clear an interrupt. This can be useful to handle peripherals which must use an interrupt to determine when data is available, for example. Bring over the basic binding file as well, from Linux v5.4. Note that the older binding is not supported in U-Boot; the newer 'special form' must be used. Add a simple test of the new functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07x86: Give each driver an IRQ typeSimon Glass
Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07dm: irq: Add support for interrupt controller typesSimon Glass
There can be different types of interrupt controllers in a system and some drivers may need to distinguish between these. In general this can be handled using the device tree by adding the interrupt information to device nodes. However on x86 devices we have interrupt controllers which are not tied to any particular device and not really used in U-Boot. These still need to be inited, so a convenient method is to give each controller a type and allow a particular controller type to be probed. Add support for this in sandbox along with a test. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove the new bland line at EOF of test/dm/irq.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07x86: Add a clock driver for Intel devicesSimon Glass
So far we have avoided adding a clock driver for Intel devices. But the Designware I2C driver needs a different clock (133MHz) on Intel devices than on others (166MHz). Add a simple driver that provides this information. This driver can be expanded later as needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07tegra: i2c: Change driver to use helper functionSimon Glass
Now that we have uclass_first_device_drvdata(), use it from the I2C driver to reduce code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07dm: core: Change syscon to use helper functionSimon Glass
Now that we have uclass_first_device_drvdata(), use it from syscon to reduce code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07dm: core: Add a function to find a device by drvdataSimon Glass
It is sometimes useful to find a device in a uclass using only its driver data. The driver data often indicates the 'subtype' of the device, e,g, via its compatible string. Add a function to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-06Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- Gen 5 and Watchdog fixes
2020-02-06video: enable VIDEO_ANSI and all VIDEO_BBP optionsAnatolij Gustschin
This partially reverts changes by commit 2cc393f32fd9 ("video: make BPP and ANSI configs optional") since it caused issues with other boards (missing LCD console output on pinebook, x86 platform or sandbox). Enable all disabled options again and opt out of not supported color depth in board defconfigs. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Vagrant Cascadian <vagrant@debian.org>
2020-02-05sandbox: Complete migration away from os_malloc()Simon Glass
Now that we can use direct access to the system malloc() in sandbox, drop the remaining uses of os_malloc(). The only one remaining now is for the RAM buffer, which we do want to be at a known address, so this is intended. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Drop the inclusion of linux/compat.h in dm.hSimon Glass
Most files don't need this header and it pulls in quite of lots of stuff, malloc() in particular. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05sandbox: Support changing the LCD colour depthSimon Glass
Add a new device-tree property to control the colour depth. At present we support 16bpp and 32bpp. While we are here, update the code to use livetree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05sandbox: sdl: Add an option to double the screen sizeSimon Glass
On high-DPI displays U-Boot's LCD window can look very small. Add a -K flag to expand it to make things easier to read, while still using the existing resolution internally. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05sandbox: sound: Handle errors better in sound_beep()Simon Glass
At present an error does not stop the sound-output loop. This is incorrect since nothing can be gained by trying to continue. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05sound: Add a new stop_play() methodSimon Glass
At present there is no positive indication that U-Boot has finished sending sound data. This means that it is not possible to power down an audio codec, for example. Add a new method that is called once all sound data has been sent. Add a new method for this, called when the sound_play() call is done. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05mtd: Rename free() to rfree()Simon Glass
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dma: Rename free() to rfree()Simon Glass
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05clk: Rename free() to rfree()Simon Glass
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05gpio: Rename free() to rfree()Simon Glass
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-01-08 17:09:45 +0000